ATMEGA64L-8AUR Atmel, ATMEGA64L-8AUR Datasheet - Page 131
ATMEGA64L-8AUR
Manufacturer Part Number
ATMEGA64L-8AUR
Description
IC MCU AVR 64K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Timer/Counter
Timing Diagrams
2490Q–AVR–06/10
output will be continuously low and if set equal to TOP the output will be set to high for non-
inverted PWM mode. For inverted PWM the output will have the opposite logic values. If OCnA
is used to define the TOP value (WGMn3:0 = 9) and COMnA1:0 = 1, the OCnA output will toggle
with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when interrupt
flags are set, and when the OCRnx Register is updated with the OCRnx buffer value (only for
modes utilizing double buffering).
Figure 55. Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling
Figure 56
Figure 56. Timer/Counter Timing Diagram, Setting of OCFnx, with Prescaler (f
Figure 57
frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOVn flag at BOTTOM.
TCNTn
OCRnx
OCFnx
TCNTn
OCRnx
OCFnx
(clk
(clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
Tn
/1)
/8)
shows the same timing data, but with the prescaler enabled.
shows the count sequence close to TOP in various modes. When using phase and
OCRnx - 1
OCRnx - 1
Figure 55
OCRnx
OCRnx
shows a timing diagram for the setting of OCFnx.
OCRnx Value
OCRnx Value
OCRnx + 1
OCRnx + 1
Tn
ATmega64(L)
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
131
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