AT91SAM7SE512B-CUR Atmel, AT91SAM7SE512B-CUR Datasheet - Page 669
AT91SAM7SE512B-CUR
Manufacturer Part Number
AT91SAM7SE512B-CUR
Description
IC ARM7 MUC FLASH 512K 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7SE256-AU.pdf
(673 pages)
Specifications of AT91SAM7SE512B-CUR
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
SAM7SE512
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
88
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
AT91SAM7SE512B
Supply Current (max)
60 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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25 AT91SAM Boot Program ..................................................................... 229
26 Peripheral DMA Controller (PDC) ....................................................... 235
27 Advanced Interrupt Controller (AIC) .................................................. 245
28 Clock Generator ................................................................................... 271
29 Power Management Controller (PMC) ................................................ 275
6222F–ATARM–14-Jan-11
25.1 Overview ............................................................................................................229
25.2 Flow Diagram ....................................................................................................229
25.3 Device Initialization ............................................................................................229
25.4 SAM-BA Boot ....................................................................................................230
25.5 Hardware and Software Constraints ..................................................................233
26.1 Overview ............................................................................................................235
26.2 Block Diagram ...................................................................................................235
26.3 Functional Description .......................................................................................236
26.4 Peripheral DMA Controller (PDC) User Interface .............................................238
27.1 Overview ............................................................................................................245
27.2 Block Diagram ...................................................................................................245
27.3 Application Block Diagram .................................................................................246
27.4 AIC Detailed Block Diagram ..............................................................................246
27.5 I/O Line Description ...........................................................................................246
27.6 Product Dependencies ......................................................................................247
27.7 Functional Description .......................................................................................248
27.8 Advanced Interrupt Controller (AIC) User Interface ...........................................260
28.1 Overview ............................................................................................................271
28.2 Slow Clock RC Oscillator ...................................................................................271
28.3 Main Oscillator ...................................................................................................271
28.4 Divider and PLL Block .......................................................................................273
29.1 Overview ............................................................................................................275
29.2 Master Clock Controller .....................................................................................275
29.3 Processor Clock Controller ................................................................................276
29.4 USB Clock Controller .........................................................................................276
29.5 Peripheral Clock Controller ................................................................................276
29.6 Programmable Clock Output Controller .............................................................277
29.7 Programming Sequence ....................................................................................277
29.8 Clock Switching Details .....................................................................................281
29.9 Power Management Controller (PMC) User Interface ......................................284
SAM7SE512/256/32 Preliminary
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