MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 8

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

8
Mnemonic
L2 Switch
Controller
PINCTRL
HSADC
OCOTP
LRADC
ICOLL
LCDIF
Block
I
2
C(2)
ADC
I
3-Port L2
Switch
ADC module
On-chip OTP
controller
and GPIO
High-speed
Interrupt
Collector
LCD Interface Multimedia
Low resolution
Pin control
2
Block Name
C module
i.MX28 Applications Processor Data Sheet for Consumer Products, Rev. 0
Table 4. i.MX28 Digital and Analog Modules (continued)
Connectivity
peripherals
Connectivity
peripherals
System control The ARM9 CPU core has two interrupt input lines, IRQ and FIQ. The interrupt
Network Control Programmable 3-Port Ethernet Switch with QOS
peripherals
Connectivity
peripherals
Security
System control
peripherals
Subsystem
The high-speed ADC block is designed to sample an analog input with 12-bit
resolution and a sample rate of up to 2 Msps. The output of the HSADC block
can be moved to the external memory through APBH-DMA. A typical user
case of the HSADC is to work with the PWM block to drive an external linear
image scanner sensor.
The I
peripherals or host controllers. The I
master or I
also controlled by CPU in PIO or PIO queue modes. It supports both 7-bit and
10-bit device address in master mode, and has programmable 7-bit address
in slave mode.
collector (ICOLL) can steer any of 128 interrupt sources to either the FIQ or
IRQ line of the ARM9 CPU.
The LCDIF provides display data for external LCD panels from simple
text-only displays to WVGA, 16/18/24 bpp color TFT panels. The LCDIF
supports all of these different interfaces by providing fully programmable
functionality and sharing register space, FIFOs, and ALU resources at the
same time. The LCDIF supports RGB (DOTCLK) modes as well as system
mode including both VSYNC and WSYNC modes.
The sixteen-channel 12-bit low-resolution ADC (LRADC) block is used for
voltage measurement. Channels 0 – 6 measure the voltage on the seven
application-dependent LRADC pins. The auxiliary channels can be used for
a variety of uses, including a resistor-divider-based wired remote control,
external temperature sensing, touch-screen, and other measurement
functions.
The on-chip one-time-programmable (OCOTP) ROM serves the functions of
hardware and software capability bits, Freescale operations and unique-ID,
the customer-programmable cryptography key, and storage of various ROM
configuration bits.
Used for general purpose input/output to external ICs. Each GPIO bank
supports 32 bits of I/O.
2
C is a standard two-wire serial interface used to connect the chip with
2
C slave mode. Each I
Brief Description
2
C has a dedicated DMA channel and can
2
C operates up to 400 kbps in either I
Freescale Semiconductor
2
C