DS90UR907QSQX/NOPB National Semiconductor, DS90UR907QSQX/NOPB Datasheet - Page 22

• Manufacturer Part Number: DS90UR907QSQX/NOPB
• Description: IC SERIALIZER 5-65MHZ 24B 36LLP
• Manufacturer: National Semiconductor

Specifications of DS90UR907QSQX/NOPB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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POWER UP REQUIREMENTS AND PDB PIN
The VDD (V
1.5 ms with a monotonic rise. If slower then 1.5 ms then a
capacitor on the PDB pin is needed to ensure PDB arrives
after all the VDD have settled to the recommended operating
voltage. When PDB pin is pulled to V
to use a 10 kΩ pull-up and a 22 uF cap to GND to delay the
PDB input signal.
TRANSMISSION MEDIA
The DS90UR907Q and the companion deserializer chipset is
intended to be used in a point-to-point configuration, through
a PCB trace, or through twisted pair cable. The DS90UR907Q
provide internal terminations providing a clean signaling en-
vironment. The interconnect for LVDS should present a dif-
DS90UR907Q
FPD-Link
Settings
RxIN3
RxIN2
RxIN1
RxIN0
* These bits are not supported by
DDn
and V
DS90UR907Q
Bit Number
Bit 26
Bit 25
Bit 24
Bit 23
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
DDIO
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
) supply ramp should be faster than
MAPSEL = 0
RGB (LSB
Example)
DDIO
G1
G0
DE
VS
HS
G7
G6
G5
G4
G3
G2
B1
B0
R1
R0
B7
B6
B5
B4
B3
B2
R7
R6
R5
R4
R3
R2
, it is recommended
TABLE 6. Alternate Color / Data Mapping
22
DS90UR906Q
CONFIG [1:0]
B6ROUT10
ferential impedance of 100 Ohms. Use cables and connectors
that have matched differential impedance to minimize
impedance discontinuities. Shielded or un-shielded cables
may be used depending upon the noise environment and ap-
plication requirements.
ALTERNATE COLOR / DATA MAPPING
Color Mapped data pin names are provided to specify a rec-
ommended mapping for 24-bit and 18-bit Applications. When
connecting to earlier generations of FPD-Link II deserializer
devices, a color mapping review is recommended to ensure
the correct connectivity is obtained.
ples for interfacing between DS90UR907Q and different de-
serializers.
= 00
N/A
DE
HS
B1
B0
G1
G0
R1
R0
VS
B7
B5
B4
B3
B2
G7
G6
G5
G4
G3
G2
R7
R6
R5
R4
R3
R2
DS90UR124
ROUT23*
ROUT22*
ROUT21*
ROUT20
ROUT19
ROUT18
ROUT17
ROUT16
ROUT15
ROUT14
ROUT13
ROUT12
ROUT11
ROUT10
ROUT9
ROUT8
ROUT7
ROUT6
ROUT5
ROUT4
ROUT3
ROUT2
ROUT1
ROUT0
CONFIG [1:0] = 10
DS99R124Q
TxOUT2
TxOUT1
TxOUT0
OS2*
OS1*
OS0*
N/A
Table 6
provides exam-
CONFIG [1:0]
DS90C124
ROUT23*
ROUT22*
ROUT21*
ROUT20
ROUT19
ROUT18
ROUT17
ROUT16
ROUT15
ROUT14
ROUT13
ROUT12
ROUT11
ROUT10
ROUT9
ROUT8
ROUT7
ROUT6
ROUT5
ROUT4
ROUT3
ROUT2
ROUT1
ROUT0
= 11