CP2110-F01-GM Silicon Laboratories Inc, CP2110-F01-GM Datasheet

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... MHz to 47 kHz RS-485 bus transceiver control  Toggle LED upon transmission  Toggle LED upon reception  Ordering Part Number CP2110-F01-GM  Package Pb-free 24-pin QFN ( mm)  Temperature Range: –40 to +85 °C CP2110 48 MHz ...

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... CP2110 2 Rev. 1.0 ...

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... GPIO.1-2—Hardware Flow Control (RTS and CTS 7.3. GPIO.3—RS-485 Transceiver Bus Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.4. GPIO.4-5—Transmit and Receive Toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8. One-Time Programmable ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9. Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 10. CP2110 Interface Specification and Windows Interface DLL . . . . . . . . . . . . . . . . . . . . 21 11. Relevant Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Rev. 1.0 CP2110 ...

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... System Overview The CP2110 is a highly-integrated HID USB-to-UART Bridge Controller providing a simple solution for updating RS-232 designs to USB using a minimum of components and PCB space. The CP2110 includes a USB 2.0 full- speed function controller, USB transceiver, oscillator, one-time programmable ROM, and an asynchronous serial data bus (UART compact QFN-24 package (sometimes called “ ...

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... The USB pull-up supply current values are calculated values based on USB specifications. Conditions V > 2 < 2 and GND IO Conditions ) Normal Operation; V Enabled REG Suspended; V Enabled REG Rev. 1.0 CP2110 Min Typ Max Units –55 — 125 °C –65 — 150 °C –0.3 — 5.8 V –0.3 — 3.6 – ...

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... CP2110 Table 3. UART and Suspend I/O DC Electrical Characteristics V = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified. IO Parameters Output High Voltage ( Output Low Voltage ( Input High Voltage ( Input Low Voltage ( Input Leakage Current Weak Pull-Up On, V Maximum Input Voltage Table 4. Reset Electrical Characteristics – ...

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... Conditions Min Typ Output x Output 0.985 — — 10 — 10 Rev. 1.0 CP2110 Min Typ Max Units 3.0 — 5.25 V 3.3 3.45 3.6 V 2.5 — — V — — 120 µA CP2110 . Max Units 1 Output x Hz 1.015 2 1 — bit time — Hz — ...

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... D I/O TXT D Out *Note: Pins can be left unconnected when not used. 8 Table 7. CP2110 Pin Definitions Description Power Supply Voltage Input. Voltage Regulator Output. See Section 9. Ground. Must be tied to ground. Device Reset. Open-drain output of internal POR or V source can initiate a system reset by driving this pin low for the time specified in Table 4 ...

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... This pin is a user-configurable input or output. This pin is a user-configurable input or output. This pin is logic high when the CP2110 is in the USB Suspend state. This pin is logic low when the CP2110 is in the USB Suspend state. No connect. This pin should be left unconnected or tied to V Rev. 1.0 CP2110 ...

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... CP2110 GPIO.0_CLK 1 GND VIO 5 VDD 6 Figure 2. QFN-24 Pinout Diagram (Top View) 10 CP2110-GM Top View GND (optional) Rev. 1.0 18 GPIO.5_RXT 17 SUSPEND 16 VPP GPIO GPIO.7 13 GPIO.8 ...

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... Typ Max Dimension 0.75 0.80 L 0.02 0.05 L1 0.25 0.30 aaa bbb 2.70 2.80 ddd eee Z 2.70 2.80 Y Rev. 1.0 CP2110 Min Typ Max 0.30 0.40 0.50 0.00 — 0.15 — — 0.15 — — 0.10 — — 0.05 — — 0.08 — ...

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... CP2110 Figure 4. QFN-24 Recommended PCB Land Pattern Table 9. QFN-24 PCB Land Pattern Dimensions Dimension Min C1 3. 0.20 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. This Land Pattern Design is based on the IPC-7351 guidelines. Solder Mask Design 3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad  ...

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... The CP2110 exits Suspend mode when any of the following occur: Resume signaling is detected or generated, a USB Reset signal is detected device reset occurs. SUSPEND and SUSPEND are weakly pulled to VIO in a high impedance state during a CP2110 reset. If this behavior is undesirable, a strong pulldown (10 k) can be used to ensure SUSPEND remains low during reset. ...

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... CP2110 6. Asynchronous Serial Data Bus (UART) Interface The UART interface consists of the TX (transmit) and RX (receive) data signals as well as the optional RTS and CTS flow control signals. The UART is programmable to support a variety of data formats and baud rates. The data format and baud rate are set during device configuration on the PC. The data formats and baud rates available to each interface are listed in Table 10 ...

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... GPIO Pins The CP2110 supports 10 user-configurable GPIO pins. Each of these GPIO pins are usable as inputs, open-drain outputs, or push-pull outputs. Six of these GPIO pins also have alternate functions which are listed in Table 11. More information regarding the configuration and usage of these pins is available in “AN144: CP21xx Customization Guide” ...

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... When the amount of data in the RX FIFO reaches the watermark, the CP2110 pulls RTS high to indicate to the external UART device to stop sending data. CTS, or Clear To Send active-low input to the CP2110 and is used by the external UART device to indicate to the CP2110 when the external UART device’s RX FIFO is getting full. The CP2110 will not send more than two bytes of data once CTS is pulled high ...

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... GPIO.5 – RX Toggle Figure 7. Transmit and Receive Toggle Typical Connection Diagram More information regarding the configuration and usage of these pins can be found in Section 8 as well as “AN144: CP21xx Customization Guide” available on the Silicon Labs web site CP2110 Rev. 1.0 CP2110 RS485 Transceiver VIO 17 ...

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... A vendor ID can be obtained from www.usb.org or Silicon Labs can provide a free PID for the OEM product that can be used with the Silicon Labs VID. All CP2110 devices are pre-programmed with a unique serial number important to have a unique serial possible for multiple CP2110-based devices to be connected to the same PC. ...

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... Voltage Regulator The CP2110 includes an on-chip 5 to 3.45 V voltage regulator. This allows the CP2110 to be configured as either a USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus- powered application using the regulator is shown in Figure 8. When enabled, the voltage regulator output appears on the V pin and can be used to power external devices ...

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... Note programming the configuration ROM via USB, add a 4.7 F capacitor between VPP and ground. During a programming operation, do not connect the VPP pin to other circuitry, and ensure that VDD is at least 3.3 V. Figure 9. Typical Self-Powered Connection Diagram (Regulator Bypass) 20 pin, the CP2110 can function as a USB self-powered DD CP2110 VIO SUSPEND ...

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... The CP2110 is a USB Human Interface Device (HID), and as most operating systems include native HID drivers, custom drivers do not need to be installed. The CP2110 does not fit one of the standard HID device types, such as a keyboard or mouse, and so any CP2110 PC application needs to use the CP2110’s HID specification to communicate with the device. The low-level HID specification for the CP2110 is provided in “ ...

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... CP2110 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...