CS-E9302 Olimex Ltd., CS-E9302 Datasheet - Page 7

• Manufacturer Part Number: CS-E9302
• Description: MCU, MPU & DSP Development Tools DEV BRD FOR EP9301/ EP9302 ARM920T
• Manufacturer: Olimex Ltd.

Specifications of CS-E9302

• Processor To Be Evaluated: EP9302 ARM920T
• Interface Type: RS-232, Ethernet, USB, I2S, JTAG, SPI, UART
• Dimensions: 110 mm x 90 mm
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Cirrus
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: EP9
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1776317 52R3485

RESET CIRCUIT:
CLOCK CIRCUIT:
JUMPER DESCRIPTION:
The EP9302 chip can be reset through the PRSTN pin(power on reset) or
through the open drain common reset pin(user reset) - RSTON pin.
PRSTN is a Power-on Reset realized with MCP130T Reset circuit with typical
2.9V threshold. On the board is present a PRN button which is used for
manual Power-on Reset.
The user reset – RSTON is common for the CS9203 microcontroller, PHY
chip, NOR flash, JTAG and MCP130 Supervisory circuit.
generated from JTAG pin(15), RSTN button, CS9302 or MCP130T Reset
circuit.
EP9302 generates its internal clock with PLL and uses single14.7456 MHz
crystal connected to EP9302 pin 119 (XTAL0) and pin 118 (XTAL1).
The Real Time Clock operates from a 32.768 KHz crystal.
Boot configuration jumpers:
The Hardware Configuration controls are defined by a set of device pins that
are latched into configuration control bits on the assertion of chip reset on
the rising edge of the PRSTN or RSTON pin. The different hardware
configuration bits define watchdog behavior, boot mode (internal or
external), boot synchronicity, and external boot width. The latched pins are:
EECLK
EEDAT
TEST[1:0]
–
The corresponding jumper is EECLK_L. When the
jumper is closed EECLK pin is log. “0”, otherwise – log.”1”.
–
The corresponding jumper is EEDAT_L. When the
jumper is closed EEDAT pin is log. “0”, otherwise – log.”1”.
–
The corresponding jumpers are T0_H/T0_L and T1_H/T1_L
When the T0_H/T0_L jumper is closed to T0_H side TEST0
pin is “1”. When the T0_H/T0_L jumper is closed to T0_L
side TEST0 pin is “0”.
When the T1_H/T1_L jumper is closed to T1_H side TEST1
pin is “1”. When the T1_H/T1_L jumper is closed to T1_L
side TEST1 pin is “0”.
Select internal or external boot
Should be pulled up to “1”
Select boot mode
It can be