CS-E9302 Olimex Ltd., CS-E9302 Datasheet - Page 8

• Manufacturer Part Number: CS-E9302
• Description: MCU, MPU & DSP Development Tools DEV BRD FOR EP9301/ EP9302 ARM920T
• Manufacturer: Olimex Ltd.

Specifications of CS-E9302

• Processor To Be Evaluated: EP9302 ARM920T
• Interface Type: RS-232, Ethernet, USB, I2S, JTAG, SPI, UART
• Dimensions: 110 mm x 90 mm
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Cirrus
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: EP9
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1776317 52R3485

EECLK EEDAT TEST1 TEST0 ASDO CSN[7:6] Boot Configuration
0
0
1
1
1
1
1
1
1
1
ASDO
CSN[7:6]
Only two selections are functional for the user, Normal Boot and Serial
Boot. The other modes are reserved for factory use only.
The BLUE table line is the default boot position.
Watchdog configuration jumpers:
CSN1
CSN2
0
0
0
0
0
0
0
0
1
0
The corresponding 3 pin jumper is ASDO_H/ASDO_L. If the
jumper is closed to ASDO_H side – ASDO pin is log. “1”.
The Other side is log. “0”.
–
–
CSN6 and CSN7 are the jumpers which define logical level
of these pins. If the jumpers are closed – the corresponding
pin is “0”.
-
If the CSN1 jumper is closed the corresponding pin
-
If the CSN2 jumper is closed the corresponding pin
Disable Watchdog reset timer
Disable Watchdog reset duration
Select synchronous or asynchronous boot
Select external boot width.
X
1
1
0
0
00
01
00
01
00
01
01
00
01
(CSN1) is “0”, otherwise – “1”.
(CSN2) is “0”, otherwise – “1”.
External boot from Sync memory space selected by
DevCfg3 through the SDRAM Controller. The
media type must be either SROM or SyncFLASH.
The selection of the SRAM width is determined by
latched CSN[7:6] value:
8-bit SFLASH
16-bit SROM
External boot from Async memory space selected by
nCS0 through Synchronous Memory Controller. The
selection of the SRAM width is determined by
latched CSN[7:6] value:
8-bit SRAM
16-bit SRAM
16-bit SERIAL BOOT
Boot from external NOR-FLASH. The selection of
the bus width is determined by latched CSN[7:6]
value:
8-bit
16-bit – DEFAULT POSITION – NORMAL BOOT
Internal boot from on-chip ROM. The selection of
the ROM width is determined by latched CSN[7:6]
value:
8-bit
16-bit