A2F-EVAL-KIT Actel, A2F-EVAL-KIT Datasheet - Page 11

• Manufacturer Part Number: A2F-EVAL-KIT
• Description: MCU, MPU & DSP Development Tools Smart Fusion Eval Kit
• Manufacturer: Actel

Specifications of A2F-EVAL-KIT

• Processor To Be Evaluated: A2F200M3F-FGG484
• Data Bus Width: 32 bit
• Interface Type: Ethernet, USB, SPI
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Fusion
The world’s first mixed-signal FPGA
Actel Fusion integrates configurable analog, large flash memory blocks, comprehensive clock generation and management circuitry and high-performance,
flash-based programmable logic in a monolithic device. Actel’s innovative Fusion architecture can be used with soft microcontroller cores, such the performance-
optimized ARM Cortex-M1, 8051s, or Actel’s own CoreABC, the smallest soft microcontroller for FPGAs.
• Integrated A/D converter (ADC)
• ADC accuracy better than
• On-chip voltage, current and
Fusion Devices
Notes:
1. Refer to the Cortex-M1 product brief for more information.
2. Pigeon Point devices only offered in FG484 and FG256 packages.
3. MicroBlade devices only offered in FG256 package.
Package I/Os: Single-/Double-Ended (Analog)
Notes:
1. Pigeon Point devices only offered in FG484 and FG256 packages.
2. MicroBlade devices only offered in FG256 package.
3. These packages are available only as RoHS-compliant (QNG package specifier).
4. AFS250 and AFS600 PQ208 devices are not pin-compatible.
5. Available in RoHS-compliant and standard leaded packages.
Fusion Devices
Cortex-M1 Devices
General
Information
Memory
Analog and I/Os
Fusion Devices
Cortex-M1 Devices
QN108
QN180
PQ208
FG256
FG484
FG676
with 8-, 10- and 12-bit
resolution and 30 scalable
analog input channels
1 percent
temperature monitors
5
5
5
4
3
3
1
System Gates
Tiles (D-flip-flops)
Secure (AES) ISP
PLLs
Globals
Flash Memory Blocks (256 KB)
Total Flash Memory (2 KB)
FlashROM Kbits (1,024 bits)
RAM Blocks (4,608 bits)
RAM (Kbits)
Analog Quads
Analog Input Channels
Gate Driver Outputs
I/O Banks (+ JTAG)
Maximum Digital I/Os
Analog I/Os
• In-system configurable
• Up to 1 MB of user flash memory
• Extensive clocking resources
• Analog PLLs
• 1 percent RC oscillator
analog supports a wide
variety of applications
60/16 (20)
75/22 (20)
37/9 (16)
AFS090
AFS090
90,000
2,304
256
Yes
18
27
15
75
20
—
—
—
1
1
1
6
5
5
4
• Crystal oscillator circuit
• Real-time counter (RTC)
• Flash FPGA fabric
• Reprogrammable
• Live at power-up
• Maximum design security
M1AFS250
M1AFS250
114/37 (24)
65/15 (24)
93/26 (24)
AFS250
250,000
AFS250
6,144
256
114
Yes
18
36
18
24
—
—
—
1
1
1
8
6
6
4
U1AFS600
M1AFS600
P1AFS600
U1AFS600
M1AFS600
P1AFS600
119/58 (40)
172/86 (40)
95/46 (40)
AFS600
600,000
AFS600
13,824
512
108
172
Yes
18
24
10
30
10
40
—
—
—
2
2
1
5
• Ultra-low power
• Firm-error immune
• Clock management
• Advanced I/O standards
• User nonvolatile FlashROM
1
2
3
2
M1AFS1500
P1AFS1500
M1AFS1500
P1AFS1500
223/109 (40)
252/126 (40)
119/58 (40)
1,500,000
AFS1500
AFS1500
38,400
1,024
270
252
Yes
18
60
10
30
10
40
—
—
—
2
4
1
5
2
1
11
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