WM9090ECS/R Wolfson Microelectronics, WM9090ECS/R Datasheet
WM9090ECS/R
Specifications of WM9090ECS/R
Related parts for WM9090ECS/R
WM9090ECS/R Summary of contents
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... SPKVDD Boost Amplifier Class D Driver SPKOUTP Speaker SPKOUTN +6dB to -57dB in 1dB steps HPOUTL DC Offset Correction +6dB to -57dB in 1dB steps HPOUTR DC Offset Correction CPVOUTP CPVOUTN Charge Pump CPCA CPCB GND AVDD Production Data, November 2010, Rev 4.1 Copyright ©2010 Wolfson Microelectronics plc ...
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WM9090 DESCRIPTION ....................................................................................................... 1 FEATURES............................................................................................................. 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................. 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION ........................................................................................... 4 ORDERING INFORMATION .................................................................................. 4 PIN DESCRIPTION ................................................................................................ 5 ABSOLUTE MAXIMUM RATINGS ......................................................................... 6 RECOMMENDED OPERATING CONDITIONS ..................................................... 6 ...
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Production Data CHARGE PUMP ........................................................................................................... 47 DC SERVO .................................................................................................................. 48 DC SERVO ENABLE AND START-UP ..................................................................................................... 48 DC SERVO ACTIVE MODES .................................................................................................................... 50 DC SERVO READBACK ........................................................................................................................... 51 REFERENCE VOLTAGES AND MASTER BIAS .......................................................... 52 POWER MANAGEMENT ............................................................................................. 53 THERMAL ...
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... WM9090 PIN CONFIGURATION 20-bump CSP package; Top View ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE WM9090ECS/R -40°C to +85°C Note: Reel quantity = 5000 w PACKAGE MOISTURE SENSITIVITY LEVEL 20-ball W-CSP MSL1 (Pb-free, Tape and reel) Production Data PEAK SOLDERING TEMPERATURE 260°C PD, November 2010, Rev 4.1 ...
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Production Data PIN DESCRIPTION PIN NO NAME A1 SPKOUTN Analogue Output A2 SPKVDD Supply A3 DNC A4 IN2N Analogue Input A5 IN2P Analogue Input B1 SPKOUTP Analogue Output B2 GND Supply B3 DNC B4 IN1N Analogue Input B5 IN1P Analogue ...
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WM9090 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics ...
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Production Data ELECTRICAL CHARACTERISTICS Test Conditions SPKVDD = 3.6V, AVDD=1.8V, GND=0V, T PARAMETER Analogue Input Pins Maximum Full-Scale input signal level - IN1P/N and IN2P/N Input Resistance Input Programmable Gain Amplifiers (PGAs) IN1A, IN1B, IN2A and IN2B Minimum Programmable Gain ...
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WM9090 Test Conditions SPKVDD = 3.6V, AVDD=1.8V, GND=0V, T PARAMETER Speaker Driver Class D Audio Performance (R SNR (A-weighted) THD (P =500mW) O THD+N (P =500mW) O PSRR DC Offset at Load Efficiency Output Power Quiescent Current Leakage Currents SVDD ...
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Production Data TERMINOLOGY 1. Signal-to-Noise Ratio (dB) – SNR is a measure of the difference in level between the maximum full scale output signal and the output with no input signal applied. 2. Total Harmonic Distortion (dB) – THD is ...
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WM9090 PERFORMANCE PLOTS w Production Data PD, November 2010, Rev 4.1 10 ...
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Production Data TYPICAL PERFORMANCE POWER CONSUMPTION Mode Battery Leakage All supplies except SVDD disabled Shutdown Leakage All supplies enabled Mode Headphone IN1+/IN1- Stereo to Headphone Speaker IN2+/IN2- Differential to Speaker Class D Notes: 1. Power in the load is included ...
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WM9090 AUDIO SIGNAL PATHS DIAGRAM w Production Data PD, November 2010, Rev 4.1 12 ...
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Production Data CONTROL INTERFACE TIMING START SCLK (input SDA Figure 1 Control Interface Timing Test Conditions SPKVDD = 3.6V, AVDD=1.8V, GND=0V, T PARAMETER SCLK Frequency SCLK Low Pulse-Width SCLK High Pulse-Width Hold Time (Start Condition) Setup ...
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WM9090 DEVICE DESCRIPTION INTRODUCTION The WM9090 is an ultra-low power, high quality audio subsystem, including a headphone and speaker driver. Its flexible architecture is designed to interface with a wide range of analogue components. The small 2.0 x 2.5mm footprint ...
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Production Data INPUT SIGNAL PATH The WM9090 supports two differential analogue input channels, configurable in a number of combinations: The inputs may be mixed together or independently routed to different combinations of output drivers. The WM9090 input signal paths and ...
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WM9090 LINE INPUTS All of the analogue input pins are designed as line inputs. These pins can be configured as single- ended or differential inputs, with flexible routing options and gain controls suitable for many different usage cases. These inputs ...
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Production Data INPUT PGA CONFIGURATION The input PGAs can be configured in single-ended mode or differential mode, using the IN1_DIFF and IN2_DIFF register bits described in Table 2. In single-ended mode, an input pin is routed to each individual PGA. ...
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WM9090 REGISTER ADDRESS R25 (19h) IN1 Line Input B Volume R26 (1Ah) IN2 Line Input A Volume w BIT LABEL DEFAULT 2:0 IN1A_VOL 011 IN1A Volume (differential mode) [2:0] 000 = -6dB 001 = -3.5dB 010 = 0dB 011 = ...
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Production Data REGISTER ADDRESS R27 (1Bh) IN2 Line Input B Volume Table 3 Input PGA Volume Control w BIT LABEL DEFAULT IN2A_ZC IN2A PGA Zero Cross Control Change gain immediately 1 = Change gain on zero ...
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WM9090 OUTPUT SIGNAL PATH The WM9090 output mixers provide a high degree of flexibility, allowing configurable operation of multiple signal paths through the device to a variety of analogue outputs. The outputs comprise a ground referenced headphone driver and Class ...
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Production Data REGISTER ADDRESS (3) Table 4 Output Signal Paths Enable SPEAKER MIXER CONTROL The signal path configuration registers for the Speaker Mixer are described in Table 5. Each of the input PGAs IN1A, IN1B, IN2A and IN2B is independently ...
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WM9090 REGISTER ADDRESS Table 5 Speaker Mixer (SPKMIX) Control SPEAKER OUTPUT VOLUME CONTROL The speaker output PGA controls are shown in Table 6. A zero-cross function is provided on the speaker output PGA. Note that the timeout clock TOCLK must ...
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Production Data HEADPHONE MIXER CONTROL The Headphone Mixer configuration registers are described in Table 8 for the Left Channel (MIXOUTL) and Table 9 for the Right Channel (MIXOUTR). A subset of the available input PGAs IN1A, IN1B, IN2A and IN2B ...
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WM9090 REGISTER ADDRESS Table 9 Right Output Mixer (MIXOUTR) Control HEADPHONE OUTPUT VOLUME CONTROL The headphone output PGA controls are shown in Table 10. The HPOUT1_VU bits control the loading of the headphone PGA volume data. When HPOUT1_VU is set ...
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Production Data REGISTER ADDRESS R28 (1Ch) Left Output Volume R29 (1Dh) Right Output Volume Table 10 Headphone Output PGA Control w BIT LABEL DEFAULT HPOUT1_VU 8 N/A 7 HPOUT1L_ZC 0 6 HPOUT1L_MUTE 0 HPOUT1L_VOL [5:0] 5:0 2Dh (-12dB) 8 HPOUT1_VU ...
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WM9090 PGA GAIN SETTING Table 11 Output PGA Volume Range w VOLUME (dB) PGA GAIN SETTING 0h -57 1h -56 2h -55 3h -54 4h -53 5h -52 6h -51 7h -50 8h -49 9h -48 Ah -47 Bh -46 ...
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Production Data AUTOMATIC GAIN CONTROL (AGC) The Speaker Output PGA incorporates an Automatic Gain Control (AGC) circuit. This feature provides an automatic reduction in the speaker path gain in order to prevent clipping or power overload at the loudspeaker. The ...
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WM9090 When the AGC applies signal attenuation triggered by the anti-clip threshold, the signal gain is reduced at a rate that is set by the AGC_CLIP_ATK register. When the anti-clip threshold is no longer met (due to the signal level ...
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Production Data AGC POWER LIMITING The second mechanism used by the AGC to monitor signal conditions is the power limit function. The speaker output voltage is measured, and the corresponding power output is determined. The power limiting function can be ...
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WM9090 REGISTER ADDRESS R99 (63h) AGC Control 1 Table 14 AGC Power Limit Control w BIT LABEL DEFAULT 15 AGC_PWR_ENA 1 AGC_PWR_AVG 12 0 11:8 AGC_PWR_THR [2:0] 0000 6:4 AGC_PWR_ATK [2:0] 000 2:0 AGC_PWR_DCY [2:0] 000 Production Data DESCRIPTION Enable ...
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Production Data ANALOGUE OUTPUTS The speaker, headphone and earpiece outputs are highly configurable and may be used in many different ways. SPEAKER OUTPUT CONFIGURATIONS The Class D speaker output is driven by the speaker mixer, SPKMIX. The speaker output operates ...
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WM9090 HEADPHONE OUTPUT CONFIGURATIONS The headphone output pins HPOUTL and HPOUTR are driven by the headphone output PGAs. Each PGA has its own dedicated volume control, as described in the “Output Signal Path” section. The inputs to these PGAs come ...
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Production Data CLK_SYS Internal Oscillator OSC_ENA Figure 6 Clocking Scheme REGISTER ADDRESS R1 (01h) Power Management (1) R6 (06h) Clocking 1 R66 (42h) Clocking 4 Table 16 Clocking Control TOCLK_RATE Table 17 TOCLK Rates w f/N f/N f/N TOCLK_ENA f/1024 ...
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WM9090 CONTROL INTERFACE The WM9090 is controlled by writing to registers through a 2-wire serial control interface. Readback is available for all registers, including Chip ID and power management status. The WM9090 is a slave device on the control interface; ...
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Production Data The sequence of signals associated with a single register write operation is illustrated in Figure 7. Figure 7 Control Interface Register Write The sequence of signals associated with a single register read operation is illustrated in Figure 8. ...
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WM9090 Figure 9 Single Register Write to Specified Address Figure 10 Single Register Read from Specified Address Figure 11 Multiple Register Write to Specified Address using Auto-increment Figure 12 Multiple Register Read from Specified Address using Auto-increment Figure 13 Multiple ...
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Production Data CONTROL WRITE SEQUENCER The Control Write Sequencer is a programmable unit that forms part of the WM9090 control interface logic. It provides the ability to perform a sequence of register write operations with the minimum of demands on ...
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WM9090 REGISTER ADDRESS R70 (46h) Write Sequencer 0 R73 (49h) Write Sequencer 3 R74 (4Ah) Write Sequencer 4 R75 (4Bh) Write Sequencer 5 Table 19 Write Sequencer Control - Initiating a Sequence PROGRAMMING A SEQUENCE A sequence consists of write ...
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Production Data WSEQ_DATA_WIDTH is a 3-bit field which identifies the width of the data block to be written. This enables selected portions of a Control Register to be updated without any concern for other bits within the same register, eliminating ...
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WM9090 Note that a ‘Dummy’ write can be inserted into a control sequence by commanding the sequencer to write a value bit 0 of Register R255 (FFh). This is effectively a write to a non-existent register location. ...
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Production Data The following default control sequences are provided: 1. Headphone Start-Up - This sequence powers up the headphone driver and charge pump. It commands the DC Servo to perform offset correction. This sequence is intended for enabling the headphone ...
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WM9090 Generic Shut-Down The Generic Shut-Down sequence can be initiated by writing 0110h to Register 73 (49h). This single operation starts the Control Write Sequencer at Index Address 16 (10h) and executes the sequence defined in Table 22. This sequence ...
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Production Data POWER SEQUENCES AND POP SUPPRESSION CONTROL The WM9090 incorporates a number of features, including Wolfson’s SilentSwitch™ technology, designed to suppress pops normally associated with Start-Up, Shut-Down or signal path control. To achieve maximum benefit from these features, careful ...
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WM9090 Step 1 Step 2 Table 25 Headphone Output Disable Sequence The register bits relating to pop suppression control are defined in Table 26. REGISTER ADDRESS R1 (01h) Power Management (1) R96 (60h) Analogue SEQUENCE HEADPHONE DISABLE ...
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Production Data REGISTER ADDRESS Table 26 Pop Suppression Control RECOMMENDED HEADPHONE START UP SEQUENCE Below is a recommended headphone start up sequence for suppressing pops. Firstly program the following sequence into the Control Write Sequencer. For further details refer to ...
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WM9090 Secondly, initiate the sequence by performing the following set of register writes. R1 (01h) Power Management (1) R2 (02h) Power Management (2) R22 (16h) IN1 Line Control R24 (18h) IN1 Line Input A Volume R25 (19h) IN1 Line Input ...
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Production Data CHARGE PUMP The WM9090 incorporates a dual-mode Charge Pump which generates the supply rails for the headphone output drivers, HPOUT1L and HPOUT1R. The Charge Pump has a single supply input, AVDD, and generates split rails CPVOUTP and CPVOUTN ...
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WM9090 DC SERVO The WM9090 provides a DC servo circuit on the headphone outputs HPOUTL and HPOUTR in order to remove DC offset from these ground-referenced outputs. When enabled, the DC servo ensures that the DC level of these outputs ...
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Production Data REGISTER ADDRESS R84 (54h) DC Servo 0 R87 (57h) DC Servo 3 R88 (58h) DC Servo Readback 0 w BIT LABEL DEFAULT DCS_TRIG_START 5 0 UP_1 4 DCS_TRIG_START 0 UP_0 DCS_TRIG_DAC_W 3 0 R_1 2 DCS_TRIG_DAC_W 0 R_0 ...
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WM9090 REGISTER ADDRESS Table 28 DC Servo Enable and Start-Up Modes DC SERVO ACTIVE MODES The DC Servo modes described above are suitable for initialising the DC offset correction circuit on the Headphone outputs as part of a controlled start-up ...
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Production Data REGISTER ADDRESS R85 (55h) DC Servo 1 Table 29 DC Servo Active Modes DC SERVO READBACK The current DC offset value for each Headphone output channel can be read from Registers R89 and R90, as described in Table ...
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WM9090 REFERENCE VOLTAGES AND MASTER BIAS This section describes the analogue reference voltage and bias current controls. It also describes the VMID soft-start circuit for pop suppressed start-up and shut-down. The analogue circuits in the WM9090 require a mid-rail analogue ...
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Production Data POWER MANAGEMENT The WM9090 provides control registers that allow users to select which functions are active. For minimum power consumption, unused functions should be disabled. To minimise pop or click noise important to enable or disable ...
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WM9090 REGISTER ADDRESS R3 (03h) Power Management (3) R57 (39h) AntiPOP2 R70 (46h) Write Sequencer 0 R76 (4Ch) Charge Pump 1 R84 (54h) DC Servo 0 Table 32 Power Management w BIT LABEL DEFAULT 4 IN2B_ENA 0 8 SPKLVOL_ENA 0 ...
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Production Data THERMAL SHUTDOWN The WM9090 incorporates a temperature sensor which detects when the device temperature is within normal limits or if the device is approaching a hazardous temperature condition. The temperature status can be polled at any time by ...
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WM9090 REGISTER MAP w Production Data PD, November 2010, Rev 4.1 56 ...
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Production Data w WM9090 PD, November 2010, Rev 4.1 57 ...
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WM9090 REGISTER BITS BY ADDRESS REGISTER BIT LABEL ADDRESS R0 (00h) 15:0 SW_RESET Software [15:0] Reset Register 00h Software Reset REGISTER BIT LABEL ADDRESS R1 (01h) 12 SPKOUTL_EN Power A Managemen t (1) 9 HPOUT1L_EN A 8 HPOUT1R_EN A 3 ...
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Production Data REGISTER BIT LABEL ADDRESS 6 IN1B_ENA 5 IN2A_ENA 4 IN2B_ENA Register 02h Power Management (2) REGISTER BIT LABEL ADDRESS R3 (03h) 14 AGC_ENA Power Managemen t (3) 8 SPKLVOL_EN A 5 MIXOUTL_EN A 4 MIXOUTR_EN A 3 SPKMIX_ENA ...
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WM9090 REGISTER BIT LABEL ADDRESS R22 (16h) 1 IN1_DIFF IN1 Line Control 0 IN1_CLAMP Register 16h IN1 Line Control REGISTER BIT LABEL ADDRESS R23 (17h) 1 IN2_DIFF IN2 Line Control 0 IN2_CLAMP Register 17h IN2 Line Control REGISTER BIT LABEL ...
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Production Data REGISTER BIT LABEL ADDRESS R25 (19h) 8 IN1_VU IN1 Line Input B Volume 7 IN1B_MUTE 6 IN1B_ZC 2:0 IN1B_VOL [2:0] Register 19h IN1 Line Input B Volume REGISTER BIT LABEL ADDRESS R26 (1Ah) 8 IN2_VU IN2 Line Input ...
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WM9090 REGISTER BIT LABEL ADDRESS Register 1Ah IN2 Line Input A Volume REGISTER BIT LABEL ADDRESS R27 (1Bh) 8 IN2_VU IN2 Line Input B Volume 7 IN2B_MUTE 6 IN2B_ZC 2:0 IN2B_VOL [2:0] Register 1Bh IN2 Line Input B Volume REGISTER ...
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Production Data REGISTER BIT LABEL ADDRESS 6 HPOUT1L_MU TE 5:0 HPOUT1L_VO L [5:0] Register 1Ch Left Output Volume REGISTER BIT LABEL ADDRESS R29 (1Dh) 8 HPOUT1_VU Right Output Volume 7 HPOUT1R_ZC 6 HPOUT1R_MU TE 5:0 HPOUT1R_VO L [5:0] Register 1Dh ...
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WM9090 REGISTER BIT LABEL ADDRESS R36 (24h) 4 SPKMIXL_TO_ SPKOUT SPKOUTL Mixers Register 24h SPKOUT Mixers REGISTER BIT LABEL ADDRESS R37 (25h) 5:3 SPKOUTL_BO ClassD3 OST [2:0] Register 25h ClassD3 REGISTER BIT LABEL ADDRESS R38 (26h) 8 SPKOUT_VU Speaker Volume ...
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Production Data REGISTER BIT LABEL ADDRESS R46 (2Eh) 6 IN1A_TO_MIX Output OUTR Mixer2 4 IN1B_TO_MIX OUTR 2 IN2A_TO_MIX OUTR 0 IN2B_TO_MIX OUTR Register 2Eh Output Mixer2 REGISTER BIT LABEL ADDRESS R47 (2Fh) 8 MIXOUTL_MU Output TE Mixer3 7:6 IN1A_MIXOUT L_VOL ...
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WM9090 REGISTER BIT LABEL ADDRESS 1:0 IN2B_MIXOUT R_VOL [1:0] Register 30h Output Mixer4 REGISTER BIT LABEL ADDRESS R54 (36h) 6 IN1A_TO_SPK Speaker MIX Mixer 4 IN1B_TO_SPK MIX 2 IN2A_TO_SPK MIX 0 IN2B_TO_SPK MIX Register 36h Speaker Mixer REGISTER BIT LABEL ...
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Production Data REGISTER BIT LABEL ADDRESS R71 (47h) 14:12 WSEQ_DATA_ Write WIDTH [2:0] Sequencer 1 11:8 WSEQ_DATA_ START [3:0] 7:0 WSEQ_ADDR [7:0] Register 47h Write Sequencer 1 REGISTER BIT LABEL ADDRESS R72 (48h) 14 WSEQ_EOS Write Sequencer 2 11:8 WSEQ_DELAY ...
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WM9090 REGISTER BIT LABEL ADDRESS R74 (4Ah) 0 WSEQ_BUSY Write Sequencer 4 Register 4Ah Write Sequencer 4 REGISTER BIT LABEL ADDRESS R75 (4Bh) 5:0 WSEQ_CURR Write ENT_INDEX Sequencer 5 [5:0] Register 4Bh Write Sequencer 5 REGISTER BIT LABEL ADDRESS R76 ...
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Production Data REGISTER BIT LABEL ADDRESS 2 DCS_TRIG_DA C_WR_0 1 DCS_ENA_CH AN_1 0 DCS_ENA_CH AN_0 Register 54h DC Servo 0 REGISTER BIT LABEL ADDRESS R85 (55h) 11:5 DCS_SERIES_ DC Servo 1 NO_01 [6:0] 3:0 DCS_TIMER_P ERIOD_01 [3:0] Register 55h DC ...
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WM9090 REGISTER BIT LABEL ADDRESS 5:4 DCS_DAC_W R_COMPLETE [1:0] 1:0 DCS_STARTU P_COMPLETE [1:0] Register 58h DC Servo Readback 0 REGISTER BIT LABEL ADDRESS R89 (59h) 7:0 DCS_DAC_W DC Servo R_VAL_1_RD Readback 1 [7:0] Register 59h DC Servo Readback 1 REGISTER ...
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Production Data REGISTER BIT LABEL ADDRESS 3 HPOUT1R_RM V_SHORT 2 HPOUT1R_OU TP 1 HPOUT1R_DL Y Register 60h Analogue HP 0 REGISTER BIT LABEL ADDRESS AGC_CLIP_EN R98 (62h) 15 AGC Control A 0 AGC_CLIP_TH 11:8 R [3:0] 6:4 AGC_CLIP_AT K [2:0] ...
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WM9090 REGISTER BIT LABEL ADDRESS 2:0 AGC_CLIP_DC Y [2:0] Register 62h AGC Control 0 REGISTER BIT LABEL ADDRESS AGC_PWR_E R99 (63h) 15 AGC Control AGC_PWR_AV G 11:8 AGC_PWR_TH R [2:0] 6:4 AGC_PWR_AT K [2:0] w DEFAULT DESCRIPTION ...
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Production Data REGISTER BIT LABEL ADDRESS 2:0 AGC_PWR_D CY [2:0] Register 63h AGC Control 1 REGISTER BIT LABEL ADDRESS R100 (64h) 8 AGC_RAMP AGC Control 2 5:0 AGC_MINGAIN [5:0] Register 64h AGC Control 2 w DEFAULT DESCRIPTION 000 AGC Power ...
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WM9090 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 16 below provides a summary of recommended external components for WM9090. Note that the diagram does not include any components that are specific to the end application e.g. they do not include filtering ...
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Production Data AUDIO INPUT PATHS The WM9090 provides 4 analogue audio inputs. Each of these inputs is referenced to the internal DC reference, VMID blocking capacitor is required for each input pin used in the target application. The ...
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WM9090 POWER SUPPLY DECOUPLING Electrical coupling exists particularly in digital logic systems where switching in one sub-system causes fluctuations on the power supply. This effect occurs because the inductance of the power supply acts in opposition to the changes in ...
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Production Data CLASS D SPEAKER CONNECTIONS The WM9090 incorporates a Class D speaker driver. As the Class D output is a pulse width modulated (PWM) signal, the choice of speakers and tracking of signals is critical for ensuring good performance ...
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WM9090 A simple equivalent circuit of a loudspeaker consists of a serially connected resistor and inductor, as shown in Figure 20. This circuit provides a low pass filter for the speaker output. If the loudspeaker characteristics are suitable, then the ...
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Production Data PCB LAYOUT CONSIDERATIONS Poor PCB layout will degrade the performance and be a contributory factor in EMI, ground bounce and resistive voltage losses. All external components should be placed as close to the WM9090 device as possible, with ...
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WM9090 PACKAGE DIMENSIONS B: 20 BALL W-CSP PACKAGE 2.530 DETAIL 2 e BOTTOM VIEW bbb Dimensions (mm) Symbols MIN NOM A 0.646 0.700 0.219 0.244 A1 ...
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... Production Data IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...