WM8983GEFL/V Wolfson Microelectronics, WM8983GEFL/V Datasheet - Page 108

• Manufacturer Part Number: WM8983GEFL/V
• Description: Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8983GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8983
w
36 (24h)
37 (25h)
38 (26h)
39 (27h)
41 (29h)
42 (2Ah)
43 (2Bh)
REGISTER
ADDRESS
2:0
8:5
4
3:0
8:6
5:0
8:0
8:0
8:4
3:0
8:6
5
8
7
6
BIT
NGTH
PLL
PRESCALE
PLLN[3:0]
PLLK[23:18]
PLLK[17:9]
PLLK[8:0]
DEPTH3D
OUT4_2ADCVOL
OUT4_2LNR
BYPL2RMIX
BYPR2LMIX
LABEL
000
0000
0
1000
000
01100
010010011
011101001
00000
0000
000
0
0
0
0
DEFAULT
ALC Noise gate threshold:
000=-39dB
001=-45dB
010=-51db
… (6dB steps)
111=-81dB
Reserved
0 = MCLK input not divided (default)
1 = Divide MCLK by 2 before input to PLL
Integer (N) part of PLL input/output frequency
ratio. Use values greater than 5 and less than
13.
Reserved
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Reserved
Stereo depth
0000: 0% (minimum 3D effect)
0001: 6.67%
....
1110: 93.3%
1111: 100% (maximum 3D effect)
Controls the OUT4 to ADC input boost stage:
000 = Path disabled (disconnected)
001 = -12dB gain
010 = -9dB gain
011 = -6dB gain
100 = -3dB gain
101 = +0dB gain
110 = +3dB gain
111 = +6dB gain
OUT4 to L or R ADC input
0 = Right ADC input
1 = Left ADC input
Left bypass path (from the Left channel input
PGA stage) to right output mixer
0 = not selected
1 = selected
Right bypass path (from the right channel input
PGA stage) to Left output mixer
0 = not selected
1 = selected
Reserved
DESCRIPTION
PD, Rev 4.3, May 2010
Input Limiter/
Automatic
Level Control
(ALC)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
3D Stereo
Enhancement
Analogue
Outputs
Analogue
Outputs
Analogue
Outputs
Analogue
Outputs
Analogue
Outputs
Production Data
REFER TO
108