WM8983GEFL/V Wolfson Microelectronics, WM8983GEFL/V Datasheet - Page 87

• Manufacturer Part Number: WM8983GEFL/V
• Description: Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8983GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
Figure 49 PLL and Clock Select Circuit
w
The PLL frequency ratio R = f
R should be chosen to ensure 5 < PLLN < 13:
To calculate R:
There is a fixed divide by 4 in the PLL, f/4, and a selectable divide by N after the PLL, MCLKDIV.
EXAMPLE:
MCLK=26MHz, required clock = 12.288MHz.
R should be chosen to ensure 5 < PLLN < 13.
MCLKDIV = 2 sets the required division rate;
Convert k to hex:
PLLK = 8FD526h
Convert PLLK to R36, R37, R38 and R39 hex values:
R36 = 7h; R37 = 23h; R38 = 1EAh; R39 = 126h
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PLLN = int R
PLLK = int (2
f
R = f
PLLN = int R
k = int ( 2
f
R = 98.304 / (26/2) = 7.561846
PLLN = int R = 7
k = int ( 2
2
2
= SYSCLK x 4 x MCLKDIV
= 4 x 2 x 12.288MHz = 98.304MHz.
2
/ (MCLK / PRESCALE) = R
24
24
24
x (R – intR)) – convert k to hex for PLLK
x (7.561846 – 7)) = 9426214
(R-PLLN))
2
/f
1
(see Figure 49) can be set using the register bits PLLK and PLLN.
dec
PD, Rev 4.3, May 2010
WM8983
87