TISP8200MDR-S Bourns Inc., TISP8200MDR-S Datasheet - Page 7

• Manufacturer Part Number: TISP8200MDR-S
• Description: Sidacs PROTECTOR - BUFFERED P-GATE PROG. PROT.
• Manufacturer: Bourns Inc.

Specifications of TISP8200MDR-S

• Breakover Current Ibo Max: 11 A
• Rated Repetitive Off-state Voltage Vdrm: 120 V
• Off-state Leakage Current @ Vdrm Idrm: 0.005 mA
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The table below shows some details of currently available SLICs using positive and negative supply rails.
The maximum total voltage, V BATR - V BATH , is normally about 10 % less than the sum of the maximum V BATR and maximum V BATH values.
In terms of voltage overshoot, ±10 V is needed for 1 µs and ±15 V for 250 ns. It is important to define the protector overshoot under actual
circuit conditions. For example, if the series line feed resistor was 20 Ω, R1 in Figure 10, and Telcordia GR-1089-CORE 2/10 and 10/1000 first
level impulses were applied, the peak protector currents would be 100 A and 33 A. Therefore, the protector voltage overshoot should be
measured at 100 A, 2/10 and 33 A, 10/1000.
Using the table values for maximum battery voltage and minimum overshoot gives a requirement of ±105 V from the output to ground and
±175 V between outputs. There needs to be temperature guard banding for the change in protector characteristics with temperature. To cover
down to -40 °C, the 25 °C protector minimum values become ±120 V referenced to ground, ±190 V between outputs and 100 V or -100 V on
the gate.
Figure 5 shows how the TISP8200M and TISP8201M limit overvoltages. The TISP8200M SCR sections limit negative overvoltages and the
TISP8201M SCR sections limit positive overvoltages.
The TISP8200M (buffered) gate is connected to the negative SLIC battery feed voltage (V BATH ) to provide the protection reference voltage.
Negative overvoltages are initially clipped close to the SLIC negative supply rail value (V BATH ) by the conduction of the TISP8200M transistor
base-emitter and the SCR gate-cathode junctions. If sufficient current is available from the overvoltage, then the SCR will crowbar into a low
voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the SCR prevents d.c. latchup with the
SLIC output current.
‡ Legerity, the Legerity logo and ISLIC are the trademarks of Legerity, Inc. (formerly AMD’s Communication Products Division).
Other product names used in this publication are for identification purposes only and may be trademarks of their respective
companies.
SLIC Parameter Values
Operation of Gated Protectors
R or T Power Max. < 10 ms
R or T Overshoot < 250 ns
R or T Overshoot < 10 ms
R or T Overshoot < 10 µs
R or T Overshoot < 1 ms
R or T Overshoot < 1 µs
Line Feed Resistance
Short Circuit Current
TISP8200M & TISP8201M
Manufacturer
V
Data Sheet Issue
BATR
AC Ringing for:
SLIC SERIES
V
V
V
BATR
BATH
BATR
SLIC #
-V
V
V
BATH
BATR
BATH
-V
max.
max.
BATH
max.
-10
-10
14/07/2000
PEB4264
SLIC-S‡
20 + 30
±130
TBA
+50
-70
+36
90
-54
45
90
+10
+30
INFINEON‡
-10
-10
14/07/2000
PEB 4265
SLIC-E‡
20 + 30
±130
-90
+90
160
+80
150
-70
85
10
+10
Customers should verify actual device performance in their specific applications.
+30
-10
-15
-5
LEGERITY™‡
-/08/2000
ISLIC™‡
79R251
±150
-85
+85
-68
+52
150
120
65
50
Specifications are subject to change without notice.
15
10
5
MAY 1998 - REVISED JANUARY 2007
V rms
Unit
mA
W
Ω
V
V
V
V
V
V
V
V
V
V
V