ATTINY12V-1SU Atmel, ATTINY12V-1SU Datasheet - Page 29

Microcontrollers (MCU) AVR 1K FLASH 64B EE 1.8V 1MHZ

ATTINY12V-1SU

Manufacturer Part Number
ATTINY12V-1SU
Description
Microcontrollers (MCU) AVR 1K FLASH 64B EE 1.8V 1MHZ
Manufacturer
Atmel
Datasheets

Specifications of ATTINY12V-1SU

Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Maximum Clock Frequency
1.2 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Program Memory Type
Flash
Program Memory Size
1 KB
Package / Case
SOIC
Package
8SOIC EIAJ
Device Core
AVR
Family Name
ATtiny
Maximum Speed
1.2 MHz
Operating Supply Voltage
2.5|3.3|5 V
Interface Type
SPI
Operating Temperature
-40 to 85 °C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MCU Status Register –
MCUSR for the ATtiny12
1006F–AVR–06/07
To identify a reset condition, the user software should clear both the PORF and EXTRF
bits as early as possible in the program. Checking the PORF and EXTRF values is done
before the bits are cleared. If the bit is cleared before an external or watchdog reset
occurs, the source of reset can be found by using the following truth table:
Table 13. Reset Source Identification
The MCU Status Register provides information on which reset source caused an MCU
reset.
• Bit 7..4 - Res: Reserved Bits
These bits are reserved bits in the ATtiny12 and always read as zero.
• Bit 3 - WDRF: Watchdog Reset Flag
This bit is set if a watchdog reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 2 - BORF: Brown-out Reset Flag
This bit is set if a brown-out reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 1 - EXTRF: EXTernal Reset Flag
This bit is set if an external reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 0 - PORF: Power-on Reset Flag
This bit is set if a power-on reset occurs. The bit is reset by writing a logic zero to the
flag.
To use the reset flags to identify a reset condition, the user should read and then reset
the MCUSR as early as possible in the program. If the register is cleared before another
reset occurs, the source of the reset can be found by examining the reset flags.
Bit
$34
Read/Write
Initial Value
EXTRF
0
1
0
1
R
7
0
-
R
6
0
-
PORF
R
0
0
1
1
5
0
-
R
4
0
-
Reset Source
Watchdog Reset
External Reset
Power-on Reset
Power-on Reset
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
ATtiny11/12
R/W
1
PORF
R/W
0
MCUSR
29

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