WM9712LGEFL/V Wolfson Microelectronics, WM9712LGEFL/V Datasheet - Page 33

• Manufacturer Part Number: WM9712LGEFL/V
• Description: Multimedia Misc Stereo AC'97 CODEC T/P Interface
• Manufacturer: Wolfson Microelectronics
• Type: Audio and Touchpanel Codecr

Specifications of WM9712LGEFL/V

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Mounting Style: SMD/SMT
• Package / Case: QFN
• Audio Codec Type: Stereo
• No. Of Adcs: 3
• No. Of Dacs: 3
• No. Of Input Channels: 8
• No. Of Output Channels: 4
• Adc / Dac Resolution: 12bit
• Adcs / Dacs Signal To Noise Ratio: 94dB
• Sampling Rate: 48kHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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JACK INSERTION AND AUTO-SWITCHING
In a phone application, a BTL ear speaker may be connected across OUT3 and HPOUTL, and a
stereo headphone on HPOUTL and HPOUTR. Typically, only one of these two output devices is
used at any given time: when no headphone is plugged in, the BTL ear speaker is active, otherwise
the headphone is used.
The presence of a headphone can be detected using GPIO1 (pin 44) and an external pull-up resistor
(see “Applications Information” section for a circuit diagram). When the jack is inserted GPIO1 is
pulled low by a switch on the socket. When the jack is removed GPIO1 is pulled high by a resistor. If
the JIEN bit is set, the WM9712L automatically switches between headphone and ear speaker, as
shown below.
Table 20 Jack Insertion / Auto-Switching (1)
Table 21 Jack Insertion / Auto-Switching (2)
JIEN
58h
Additional
Functional
Control
REGISTER
ADDRESS
0
1
1
0
1
FRC GPIO1
X
0
0
1
1
12
11
X
X
X
BIT
0
1
Jack insert detection disabled
(headphone and ear speaker
can be used at the same
time)
Jack insert detection
enabled, headphone plugged
in
Jack insert detection
enabled, headphone not
plugged in
Force Ear Speaker Mode
Invalid; do not use this setting
JIEN
FRC
LABEL
MODE DESCRIPTION
0
0
DEFAULT
Jack Insert Enable – Takes output of GPIO1
logic
Force Ear Speaker Mode
See table below
Set by
reg.
24h
and
26h
Set by
reg.
24h
and
26h
Set by
reg.
16h
DESCRIPTION
PD Rev 4.5 August 2006
WM9712L
33