NCP1910A65DWR2G ON Semiconductor, NCP1910A65DWR2G Datasheet - Page 25

• Manufacturer Part Number: NCP1910A65DWR2G
• Description: AC/DC Switching Converters GREENM COMBO 2GND N/SKIP
• Manufacturer: ON Semiconductor
• Type: Combo Controllerr

Specifications of NCP1910A65DWR2G

• Input / Supply Voltage (max): 20 V
• Switching Frequency: 500 KHz
• Operating Temperature Range: - 60 C to + 150 C
• Mounting Style: SMD/SMT
• Package / Case: SO-24
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 60 C
• Number Of Outputs: 2
• Output Current: 5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PFC Reference Section
$2% accurate over the temperature range (the typical value
is 2.5 V). V
PFC section.
PFC Feedback and Compensation
FB pin via the resistor divider (R
Figure 49. V
V
Over−voltage protection (OVP), fast transient response, and
under−voltage protection (UVP)
constructs a control voltage, V
output power and hence V
V
for PFC duty modulation is after decreasing a offset voltage,
V
that comes from the PFC output voltage V
varying signal. The bandwidth of V
limited by inserting the external type−2 compensation
components (that are R
It is recommended to limit cross over frequency of open loop
system below 20 Hz typically if the input ac voltage is 50 Hz
to achieve power factor correction purpose.
Equation 16 if C
V
bulk
CTRL
CTRL(min)
The internal reference voltage (V
The output voltage V
The feedback signal V
The Operational Trans−conductance Amplifier (OTA)
This control voltage V
The transformer of V
in
R
FBL
C
and will be used in the output voltage regulation,
is from V
P
Figure 49. V
R
FBU
, i.e. V
PREF
bulk
V
Z
is regulated as described in Equation 16.
bulk
is the reference used for the regulation of
CTRL(min)
C
R
CTRL
>> C
Z
V
Z
+ V
CTRL
FB
CTRL
V
Z
PREF
−V
bulk
P
, C
. G
CTRL
bulk
PREF
FB
CTRL(min)
Type−2 Compensation
Z
to V
EA
, and C
of the PFC circuits is sensed at
bulk
represents the output voltage
to V
R
is a roughly constant voltage
is the error amplifier gain.
FBU
CTRL(max)
FBL
. The operating range of
To Multiplier of V
CTRL
OTA
R
CTRL
P
CTRL
) R
PREF
.
FBL
as shown in Figure 49).
and R
, depending on the
FBL
can be additionally
is as described in
bulk
) is trimmed to be
. The signal used
FBU
V
bulk
that is a slowly
) as shown in
M
V
CTRL(min)
pin
(eq. 16)
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25
PFC Power Analysis and V
re−formulated in Equation 18.
Equation 19.
high−frequency component of the multiplier voltage V
The high−frequency component is basically coming from
the inductor current I
capacitor C
component of inductor current I
C
becomes I
the bandwidth of 50 or 60 Hz and power factor is corrected.
Equations 20 and 21 when the circuit efficiency η is
obtained or assumed. The variable V
input voltage.
independent from input voltage. Hence the transfer function
of power stage is independent from input voltage, which
easies the compensation loop design.
V
Z
Z
in
P
P
From Equation 7 through 13, the input impedance Z
When I
The multiplier capacitor C
Input and output power (P
Because of the V
V
in
in
CTRL
in
in
match with each other in terms of filtering capability, I
bulk
T
T
+
+
+
+ hP
V
p
p
+
V
V
Z
ac
L
2
2
L−50
2R
in
CTRL
CTRL
in
R
R
R
is equal to I
2R
R
2
+ h
CS
CS
M
in
FBL
+
FBL
. Input impedance Z
M
R
* V
* V
@ V
@ V
R
V
V
SENSE
p
similarly removes the high−frequency
p
@ G
) R
bulk
bulk
SENSE
2
2
@ R
@ R
CTRL min
CTRL min
in
CTRL
CTRL
EA
2
FBU
L
L−50
@ K
R
CS
CS
feed−forward, the power delivery is
. On the other hand, the input filter
2R
@ K
2R
Z
* V
* V
@ V
@ V
@
LBO
, Equation 18 is re−formulated in
M
M
LBO
sR
R
R
in
CTRL min
CTRL min
SENSE
CTRL
SENSE
2
2
CTRL
in
Z
M
2
@ V
C
Feed−Forward
1 ) sR
L
@ V
. If the capacitors C
and P
Z
in
is the one to filter the
ac
* V
* V
1 ) sR
is roughly constant over
K
K
ac
LBO
LBO
2
ac
2
@ V
CTRL min
CTRL min
Z
out
@ V
@ V
stands for the rms
C
@ V
2
2
) are derived in
Z
bulk
Z
@ V
PREF
PREF
@ V
C
bulk
P
bulk
bulk
I
I
L
L−50
@ V
@ V
(eq. 17)
(eq. 18)
(eq. 19)
(eq. 20)
(eq. 21)
PREF
PREF
M
in
and
M
is
L
.