MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 15

• Manufacturer Part Number: MAX5978ETJ+
• Description: Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
• Manufacturer: Maxim Integrated Products

Specifications of MAX5978ETJ+

• Product: Controllers & Switches
• Supply Voltage (max): 16 V
• Supply Voltage (min): 0 V
• Power Dissipation: 2759 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Supply Current: 2.5 mA
• Package / Case: TQFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 3a. Register Function
Table 3b. status1 Register Format
Figure 1 shows the detailed logic operation of the hot-
swap enable signals EN1, EN2, and ON, as well as the
effect of various fault conditions.
An input undervoltage threshold control for enabling
the hot-swap channel can be implemented by placing
a resistive divider between the drain of the hot-swap
MOSFET and ground, with the midpoint connected to
ON. The turn-on threshold voltage for the channel is then:
The maximum rating for the ON input is 6V; do not
exceed this value.
When all conditions for channel turn-on are met, the
external n-channel MOSFET switch is fully enhanced
with a typical gate-to-source voltage of 5V to ensure
a low drain-to-source resistance. The charge pump at
the GATE driver sources 5FA to control the output volt-
age turn-on voltage slew rate. An external capacitor
can be added from GATE to GND to further reduce the
Description:
Resister Title:
Register Address:
REGISTER
ADDRESS
prot[1]
Bit 7
0x32
R
Current, Voltage Monitor, and 4 LED Drivers
V
0 to 16V, Hot-Swap Controller with 10-Bit
EN
BIT RANGE
prot[0]
Bit 6
= 0.6V x (R1 + R2)/R2
R
[1:0]
[7:6]
[4]
Fault-detection behavior (three-state PROT input) and ON input status register
status1
0x32
Bit 5
ON input state
1 = ON above 600mV channel enable threshold
0 = ON below 600mV channel enable threshold
Bit 0: ON input state
Bit 1: unused
Unused
Voltage critical behavior (PROT input)
00 = Assert ALERT upon UV/OV critical (same as UV/OV warning behavior)
01 = Assert ALERT and deassert PG upon UV/OV critical
10 = Assert ALERT, deassert PG, and shut down channel upon UV/OV critical
11 = (Not possible)
—
R
Unused
Bit 4
R
Startup
Bit 3
—
R
voltage slew rate. Placing a 1kI resistor in series with
this capacitance prevents the added capacitance from
increasing the gate turn-off time. Total inrush current is
the load current summed with the product of the gate-
voltage slew rate dV/dt and the load capacitance.
To determine the output dV/dt during startup, divide
the GATE pullup current I
capacitance. The voltage at the source of the external
MOSFET follows the gate voltage, so the load dV/dt is
the same as the gate dV/dt. Inrush current is the product
of the dV/dt and the load capacitance. The time to start
up t
dV/dt.
Be sure to choose an external MOSFET that can handle
the power dissipated during startup. The inrush cur-
rent is roughly constant during startup and the voltage
drop across the MOSFET (drain to source) decreases
linearly as the load capacitance charges. The resulting
power dissipation is, therefore, roughly equivalent to a
single pulse of magnitude (V
SU
DESCRIPTION
Bit 2
is the hot-swap voltage V
—
R
Unused
Bit 1
R
G(UP)
S
x inrush current)/2 and
S
by the gate-to-ground
divided by the output
Bit 0
ON
R
RESET
VALUE
—
—
15