MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 37

• Manufacturer Part Number: MAX5978ETJ+
• Description: Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
• Manufacturer: Maxim Integrated Products

Specifications of MAX5978ETJ+

• Product: Controllers & Switches
• Supply Voltage (max): 16 V
• Supply Voltage (min): 0 V
• Power Dissipation: 2759 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Supply Current: 2.5 mA
• Package / Case: TQFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 54. Circular Buffer Readout Sequence
The slave generates a NACK at step 5 if the command
code is invalid. The command code must be in the 0x00
to 0x45 range. The internal address pointer returns
to 0x00 after incrementing from the highest register
address.
The receive-byte protocol allows the master device to
read the register content of the device (see Figure 7).
The EEPROM or register address must be preset with a
send-byte protocol first. Once the read is complete, the
internal pointer increases by one. Repeating the receive
byte protocol reads the contents of the next address.
The receive-byte procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a read
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5) The slave increments its internal address pointer.
6) The master asserts an ACK on SDA and repeats
The internal address pointer returns to 0x00 after incre-
menting from the highest register address.
Use the send-byte protocol to set the register address
pointers before read and write operations. For the con-
figuration registers, valid address pointers range from
0x00 to 0x45, and the circular buffer addresses are 0x46
to 0x49. Register addresses outside this range result in
a NACK being issued from the device.
Chronological Number
bit (high).
steps 4, 5 or asserts a NACK and generates a STOP
condition.
READ-OUT ORDER
Current, Voltage Monitor, and 4 LED Drivers
0 to 16V, Hot-Swap Controller with 10-Bit
1ST OUT
1
Address Pointers
Receive Byte
2ND OUT
2
The circular buffer read operation is similar to the
receive-byte operation. The read operation is triggered
after any one of the circular buffer base addresses is
loaded. During a circular buffer read, although all is
transparent from the external world, internally the autoin-
crement function in the I
it is possible to read one of the circular buffer blocks
with a burst read without changing the virtual internal
address corresponding to the base address. Once the
master issues a NACK, the circular reading stops, and
the default functions of the I
restored.
In 8-bit read mode, every I
a single sample from the circular buffer. In 10-bit mode,
two subsequent I
10-bit sample from the circular buffer, with the high-order
byte read first, followed by a byte containing the right-
shifted 2 least-significant bits. Once the master issues a
NACK, the read circular buffer operation terminates and
normal I
The data in the circular buffers is read back with the
next-to-oldest sample first, followed by progressively
more recent samples until the most recent sample is
retrieved, followed finally by the oldest sample (see
Table 54).
PROCESS: BiCMOS
For the latest package outline information and land pat terns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suf fix character, but the drawing
pertains to the package regardless of RoHS status.
32 TQFN-EP
PACKAGE
…
…
TYPE
2
C operation returns.
48TH OUT
PACKAGE
T3255+4
48
2
CODE
C read operations shift out a single
Package Information
2
C controller is disabled. Thus,
2
2
C read operation shifts out
49TH OUT
Chip Information
C slave bus controller are
Circular Buffer Read
OUTLINE
21-0140
49
NO.
PATTERN NO.
50TH OUT
90-0012
LAND
0
37