LC4064ZE-7MN64I Lattice, LC4064ZE-7MN64I Datasheet - Page 8

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LC4064ZE-7MN64I

Manufacturer Part Number
LC4064ZE-7MN64I
Description
CPLD - Complex Programmable Logic Devices 64MC 48 I/O Low Pwr 1.8V 7.5ns
Manufacturer
Lattice
Series
ispMACH®r
Datasheet

Specifications of LC4064ZE-7MN64I

Memory Type
EEPROM
Number Of Macrocells
64
Maximum Operating Frequency
178.57 MHz
Delay Time
7.5 ns
Number Of Programmable I/os
48
Operating Supply Voltage
1.8 V
Supply Current
0.08 mA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Package / Case
CSBGA
Mounting Style
SMD/SMT
Supply Voltage (max)
1.9 V
Supply Voltage (min)
1.7 V
Programmable Type
CPLD
Voltage - Input
1.7 V ~ 1.9 V
Speed
7.5ns
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LC4064ZE-7MN64I
Manufacturer:
Lattice
Quantity:
490
Part Number:
LC4064ZE-7MN64I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Output Routing Pool (ORP)
The Output Routing Pool allows macrocell outputs to be connected to any of several I/O cells within an I/O block.
This provides greater flexibility in determining the pinout and allows design changes to occur without affecting the
pinout. The output routing pool also provides a parallel capability for routing macrocell-level OE product terms. This
allows the OE product term to follow the macrocell output as it is switched between I/O cells. The enhanced ORP of
the ispMACH 4000ZE family consists of the following elements:
Figure 7 shows the structure of the ORP from the I/O cell perspective. This is referred to as an ORP slice. Each
ORP has as many ORP slices as there are I/O cells in the corresponding I/O block.
Figure 7. ORP Slice
Output Routing Multiplexers
The details of connections between the macrocells and the I/O cells vary across devices and within a device
dependent on the maximum number of I/Os available. Tables 5-7 provide the connection details.
Table 5. GLB/MC/ORP Combinations for ispMACH 4256ZE
[GLB] [MC 0]
[GLB] [MC 1]
[GLB] [MC 2]
[GLB] [MC 3]
[GLB] [MC 4]
[GLB] [MC 5]
[GLB] [MC 6]
[GLB] [MC 7]
• Output Routing Multiplexers
• OE Routing Multiplexers
GLB/MC
M0, M1, M2, M3, M4, M5, M6, M7
M2, M3, M4, M5, M6, M7, M8, M9
M4, M5, M6, M7, M8, M9, M10, M11
M6, M7, M8, M9, M10, M11, M12, M13
M8, M9, M10, M11, M12, M13, M14, M15
M10, M11, M12, M13, M14, M15, M0, M1
M12, M13, M14, M15, M0, M1, M2, M3
M14, M15, M0, M1, M2, M3, M4, M5
From PTOE
From Macrocell
Output Routing Multiplexer
OE Routing Multiplexer
ORP Mux Input Macrocells
8
OE
ispMACH 4000ZE Family Data Sheet
To I/O
To I/O
Cell
Cell

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