A3PN030-ZQNG48 Actel, A3PN030-ZQNG48 Datasheet - Page 35
A3PN030-ZQNG48
Manufacturer Part Number
A3PN030-ZQNG48
Description
FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet
1.A3PN030-ZVQG100.pdf
(106 pages)
Specifications of A3PN030-ZQNG48
Processor Series
A3PN030
Core
IP Core
Number Of Macrocells
256
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
34
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
30 K
Package / Case
QFN-48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 2-25 • Schmitt Trigger Input Hysteresis
Table 2-26 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
Input Buffer Configuration
3.3 V LVTTL / LVCMOS (Schmitt trigger mode)
2.5 V LVCMOS (Schmitt trigger mode)
1.8 V LVCMOS (Schmitt trigger mode)
1.5 V LVCMOS (Schmitt trigger mode)
Input Buffer
LVTTL/LVCMOS
(Schmitt
disabled)
LVTTL/LVCMOS
(Schmitt
enabled)
Note:
The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the
noise is low, then the rise time and fall time of input buffers can be increased beyond the
maximum value. The longer the rise/fall times, the more susceptible the input signal is to the
board noise. Actel recommends signal integrity evaluation/characterization of the system to
ensure that there is no excessive noise coupling into input signals.
Hysteresis Voltage Value (Typ.) for Schmitt Mode Input Buffers
trigger
trigger
Input Rise/Fall Time (min.) Input Rise/Fall Time (max.)
No requirement
No requirement
R e v i s i o n 8
noise voltage cannot exceed
No requirement, but input
Schmitt hysteresis
10 ns *
Hysteresis Value (typ.)
ProASIC3 nano Flash FPGAs
140 mV
240 mV
80 mV
60 mV
20 years (100°C)
20 years (100°C)
Reliability
2- 21
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