LFXP3C-4TN144C Lattice, LFXP3C-4TN144C Datasheet - Page 214
LFXP3C-4TN144C
Manufacturer Part Number
LFXP3C-4TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer
Lattice
Specifications of LFXP3C-4TN144C
Number Of Programmable I/os
100
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Quantity
Price
Company:
Part Number:
LFXP3C-4TN144C
Manufacturer:
Lattice
Quantity:
135
Company:
Part Number:
LFXP3C-4TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFXP3C-4TN144C-3I
Manufacturer:
TI
Quantity:
19
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Figure 9-58. PFU Based Distributed Dual Port RAM Timing Waveform – With Output Registers
Distributed ROM (Distributed_ROM) – PFU Based
PFU-based Distributed ROM is also created using the 4-input LUT (Look-Up Table) available in the PFU. These
LUTs can be cascaded to create larger distributed memory sizes.
Figure 9-59 shows the Distributed Single Port RAM module as generated by IPexpress.
Figure 9-59. Distributed ROM Generated by IPexpress
The generated module makes use of the 4-input LUT available in the PFU. The basic Distributed Dual Port RAM
primitive for the LatticeECP/EC and LatticeXP devices is shown in Figure 9-60.
WrClockEn
RdClockEn
WrAddress
RdAddress
WrClock
RdClock
Reset
Data
WE
Q
t
t
t
SUWREN_PFU
SUWREN_PFU
t
SUADDR_PFU
SUDATA_PFU
Data_0
Add_0
OutClockEn
OutClock
t
t
HADDR_PFU
HDATA_PFU
Address
t
HWREN_PFU
Reset
Invalid Data
Data_1
Add_1
9-49
Distributed ROM
PFU-based
t
SUCE_PFU
Add_0
LatticeECP/EC and LatticeXP Devices
t
HWREN_PFU
t
CORAM_PFU
Q
Data_0
Add_1
Memory Usage Guide
Data_1
t
HCE_PFU
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