A3P400-FGG256 Actel, A3P400-FGG256 Datasheet - Page 33
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A3P400-FGG256
Manufacturer Part Number
A3P400-FGG256
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet
1.A3P1000-FGG144.pdf
(218 pages)
Specifications of A3P400-FGG256
Processor Series
A3P400
Core
IP Core
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
194
Data Ram Size
55296
Delay Time
11.1 ns
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
400 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3P400-FGG256C
Manufacturer:
ACTEL
Quantity:
1 156
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
YAGEO
Quantity:
460 000
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
ACT
Quantity:
1 170
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-18 • Summary of Maximum and Minimum DC Input and Output Levels Applicable to Commercial and
I/O Standard
3.3 V LVTTL /
3.3 V
LVCMOS
3.3 V
LVCMOS
Wide Range
2.5 V
LVCMOS
1.8 V
LVCMOS
1.5 V
LVCMOS
3.3 V PCI
3.3 V PCI-X
Notes:
1. Currents are measured at 85°C junction temperature.
2. Please note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.
operate at the equivalent software default drive strength. These values are for Normal Ranges ONLY.
Industrial Conditions—Software Default Settings
Applicable to Advanced I/O Banks
3
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Strength
100 µA
12 mA
12 mA
12 mA
Drive
12 mA
Software
Strength
Option
Default
Equiv.
12 mA
12 mA
12 mA
12 mA
12 mA
Drive
2
Slew
Rate
High –0.3
High –0.3
High –0.3
High –0.3 0.35 * VCCI 0.65 * VCCI 1.9
High –0.3 0.35 * VCCI 0.65 * VCCI 1.6
Min.
V
VIL
Max.
0.8
0.8
0.7
V
Per PCI-X specifications
Per PCI specifications
R e v i s i o n 9
Min.
1.7
V
2
2
VIH
Max.
3.6
3.6
2.7
V
0.25 * VCCI 0.75 * VCCI 12
Max.
VOL
0.45
0.2
0.4
0.7
V
ProASIC3 Flash Family FPGAs
VCCI – 0.45 12
VCCI – 0.2
VOH
Min.
2.4
1.7
V
I
mA mA
0.1 0.1
OL
12
12
1
I
OH
2- 19
12
12
12
12
1
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