DG403DY-E3 Vishay, DG403DY-E3 Datasheet - Page 8

• Manufacturer Part Number: DG403DY-E3
• Description: Analog Switch ICs SPDT Analog Switch
• Manufacturer: Vishay
• Type: Analog Switchr

Specifications of DG403DY-E3

• Number Of Switches: Dual
• Switch Configuration: SPDT
• On Resistance (max): 45 Ohms @ +/- 13.5 V
• On Time (max): 150 ns @ +/- 15 V
• Off Time (max): 100 ns @ +/- 15 V
• Supply Voltage (max): 25 V
• Supply Current: 0.00001 mA @ +/- 16.5 V
• Maximum Power Dissipation: 600 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-16 Narrow
• Minimum Operating Temperature: - 40 C
• Analog Switch Type: SPDT
• No. Of Channels: 2
• On State Resistance Max: 30ohm
• Turn Off Time: 30ns
• Turn On Time: 75ns
• Supply Voltage Range: ± 15V
• Operating Temperature Range: -40°C To +85°C
• Package: 16SOIC N
• Maximum On Resistance: 55@±13.5V Ohm
• Maximum High Level Output Current: 100 mA
• Number Of Channels Per Chip: 2
• Maximum Turn-off Time: 100@±15V ns
• Maximum Turn-on Time: 150@±15V ns
• Switch Architecture: SPDT
• Power Supply Type: Single|Dual
• Multiplexer Configuration: Dual SPDT
• Number Of Inputs: 4
• Number Of Outputs: 4
• Number Of Channels: 2
• Analog Switch On Resistance: 45@±13.5VOhm
• Package Type: SOIC N
• Power Supply Requirement: Single/Dual
• Single Supply Voltage (min): 13V
• Single Supply Voltage (typ): 15/18/24/28V
• Single Supply Voltage (max): 36V
• Dual Supply Voltage (min): ±7V
• Dual Supply Voltage (typ): ±9/±12/±15/±18V
• Dual Supply Voltage (max): ±22V
• Power Dissipation: 600mW
• Mounting: Surface Mount
• Pin Count: 16
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

DG401, DG403, DG405
Vishay Siliconix
TEST CIRCUITS
V
trailing edge of the output waveform.
www.vishay.com
8
V
V
O
± 10 V
S1
S2
V
g
is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and
+ 5 V
+ 5 V
S
S
IN
3 V
1
2
GND
R
C
V
S
IN
g
GND
L
L
V
(includes fixture and stray capacitance)
L
V
C
O
L
= V
(includes fixture and stray capacitance)
+ 15 V
+ 15 V
S
IN
+ 5 V
GND
S
V
L
- 15 V
- 15 V
V+
V-
V+
V-
D
D
D
1
2
R
L
R
+ r
L
+ 15 V
- 15 V
DS(on)
V+
V-
R
1
R
D
L
kΩ
L 2
L2
C
L2
V
O2
C
35 pF
L
10 nF
C
V
L
R
O
L1
Figure 3. Break-Before-Make
V
O
Figure 4. Charge Injection
Figure 2. Switching Time
C
L1
V
O1
Note: Logic input waveform is inverted for switches that
* V
S
Logic
Input
Switch
Switch
Output
Switch
Input*
Input*
= 10 V for t
have the opposite logic sense control
V
IN
O
Logic
Input
Switch
Output
Switch
Output
ON
-V
On
0 V
0 V
V
, V
S
S
S
V
V
V
V
3 V
0 V
0 V
0 V
= - 10 V for t
O1
O2
S1
S2
V
O
ΔV
O
50 %
Q = ΔV
OFF
90 %
Off
t
50 %
90 %
D
S09-2561-Rev. I, 30-Nov-09
t
ON
Document Number: 70049
O
x C
90 %
L
t
OFF
V
t
t
O
f
f
< 20 ns
< 20 ns
On
t
D
90 %