EVAL-PAN1321 Panasonic, EVAL-PAN1321 Datasheet - Page 10

Bluetooth / 802.15.1 Modules & Development Tools

EVAL-PAN1321

Manufacturer Part Number
EVAL-PAN1321
Description
Bluetooth / 802.15.1 Modules & Development Tools
Manufacturer
Panasonic
Datasheets

Specifications of EVAL-PAN1321

Wireless Frequency
2.4 GHz
Interface Type
I2C, JTAG, UART
Data Rate
3 Mbps
Modulation
DQPSK
Operating Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Output Power
2.5 dBm
Technology/ Type
PAN1321 Evaluation Kit
Processor Series
PAN1321
For Use With/related Products
ENW-89811K4CF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.4
The non-shaded cells indicate pins that will be fixed for the product lifetime. Shaded cells indicate that the pin might
be removed/changed in future variants. Pins not listed below shall not be connected.
Table 1
Pin
No.
A2
A3
A8
B1
B2
B3
B4
B5
B9
C2
C3
C4
D1
D2
D3
D4
D5
E1
E2
E3
E4
E5
E6
F2
F3
Hardware Description
User’s Manual
Symbol
P1.6
RESET#
P1.5
P1.7
P1.8
P1.0 /
TMS
P1.4 /
RTCK
ONOFF
SLEEPX
P0.9
JTAG#
TRST#
P0.10
P0.8
P1.1 /
TCK
P0.3
P0.2
P0.12 / SDA0
P0.13 / SCL0
P1.3 /
TDO
P0.0
P0.1
P0.5 /
UARTRXD
P1.2 /
TDI
P0.11
Pin Description
Pin Description
Input /
Output
I/O/OD
AI
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I
I/O
I/O/OD
I
I
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
I/O/OD
Supply Voltage During
Internal1
Internal1
Internal1
Internal1
Internal1
Internal2
Internal2
VDDUART
Internal2
Internal2
Internal2
Internal2
Internal2
Internal2
VDD1
VDD1
Internal2
Internal2
Internal2
VDD1
VDD1
VDDUART
Internal2
Internal2
10
Reset
Z
Input
Input
PD/ Input PD/ Input Port 1.7
PD
PU
Z
-
PD
Z
PU
PD
Z
PD
PU
Conf.
PD def.
Z
PU
PU
Z
PD
PD
Z
PU
Z
1)
1)
1)
After
Reset
Z
Input
Input
PD
PU
Z
-
H
Z
PU
PD
Z
PD
PU
Conf.
PD def.
Z
PU
PU
Z
PD
PD
Z
PU
Z
1)
1)
1)
Function
Port 1.6
Hardware Reset
Port 1.5
Port 1.8
Port 1.0 or
JTAG interface
Port 1.4 or
JTAG interface
Turns off module completely
Sleep indication signal
Port 0.9
Mode selection Port 1:
0: JTAG
1: Port
JTAG interface
Port 0.10
Port 0.8
Port 1.1 or
JTAG interface
Port 0.3
Port 0.2
I2C data signal
I2C clock signal
Port 1.3 or
JTAG interface
Port 0.0
LPM wakeup output
Port 0.1
Port 0.5 or
UART receive data
Port 1.2 or
JTAG interface
Port 0.11
General Device Overview
Revision 3.1, 2011-01-18
ENW89811K4CF
PAN1321-SPP

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