FDT86102LZ Fairchild Semiconductor, FDT86102LZ Datasheet - Page 2

• Manufacturer Part Number: FDT86102LZ
• Description: MOSFET N-CH 100V 6.6A SOT-223
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDT86102LZ

• Input Capacitance (ciss) @ Vds: 1490pF @ 50V
• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 28 mOhm @ 6.6A, 10V
• Drain To Source Voltage (vdss): 100V
• Current - Continuous Drain (id) @ 25° C: 6.6A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 25nC @ 10V
• Power - Max: 1W
• Mounting Type: Surface Mount
• Package / Case: TO-261-4, TO-261AA
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 28 mOhms
• Forward Transconductance Gfs (max / Min): 26 S
• Drain-source Breakdown Voltage: 100 V
• Continuous Drain Current: 6.6 A
• Power Dissipation: 2.2 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FDT86102LZ Rev. C
©2010 Fairchild Semiconductor Corporation
NOTES:
1. R
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Starting T
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
Electrical Characteristics
DSS
GSS
ΔV
d(on)
r
d(off)
f
rr
DS(on)
FS
the user's board design.
GS(th)
iss
oss
rss
g
SD
ΔT
ΔT
g(TOT)
g(TOT)
gs
gd
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1 in
J
= 25 °C, L = 1 mH, I
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
AS
= 13 A, V
Parameter
DD
= 90 V, V
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
a)
GS
= 25 °C unless otherwise noted
55 °C/W when mounted on a
1 in
= 10 V.
2
pad of 2 oz copper
V
V
I
I
I
V
V
V
I
V
V
V
V
V
f = 1MHz
V
V
V
V
F
D
D
D
GS
GS
DS
GS
GS
GS
GS
GS
DS
DS
DD
GS
GS
GS
= 6.6 A, di/dt = 100 A/μs
= 250 μA, V
= 250 μA, referenced to 25 °C
= 250 μA, referenced to 25 °C
= 0 V, I
= 0 V, I
= 80 V, V
= 5 V, I
= 50 V, V
= 0 V to 10 V
= 0 V to 4.5 V
= ±20 V, V
= V
= 10 V, I
= 4.5 V, I
= 10 V, I
= 50 V, I
= 10 V, R
DS
2
Test Conditions
, I
S
S
D
D
D
= 6.6 A
= 1 A
D
D
D
GS
GS
= 6.6 A
GEN
GS
= 6.6 A,
= 250 μA
DS
= 6.6 A
= 5.5 A
= 6.6 A, T
= 0 V
= 0 V,
= 0 V
= 0 V
= 6 Ω
V
I
D
DD
= 6.6 A
= 50 V,
J
= 125 °C
(Note 2)
(Note 2)
θJC
is guaranteed by design while R
Min
100
1.0
b)
118 °C/W when mounted on
a minimum pad of 2 oz copper
1118
0.82
0.68
Typ
181
1.4
7.5
0.5
22
27
36
26
6.6
1.9
2.2
8.3
2.6
2.2
70
40
36
-6
19
17
1490
Max
θCA
245
±10
3.0
1.3
1.2
15
28
38
46
64
58
14
10
31
10
25
12
1
www.fairchildsemi.com
is determined by
mV/°C
mV/°C
Units
mΩ
μA
μA
nC
pF
pF
pF
nC
nC
nC
ns
Ω
ns
ns
ns
ns
V
V
S
V