IP4251CZ8-4,118 NXP Semiconductors, IP4251CZ8-4,118 Datasheet - Page 8

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IP4251CZ8-4,118

Manufacturer Part Number
IP4251CZ8-4,118
Description
IC EMI FILTER 8HXSON
Manufacturer
NXP Semiconductors
Datasheet

Specifications of IP4251CZ8-4,118

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
IP4251_52_53_54_3
Product data sheet
Fig 5.
(dB)
S
(1) IP4253CZ16 - ch1 to ch16
(2) IP4253CZ16 - ch4 to ch13
21
10
20
30
40
50
0
10
IP4253 frequency response curves
1
7.2.1 SD(HC) and MMC memory interface
7.2 Selection
1
Due to the optimized silicon dice and package design, all channels in a single package
show a very good matching performance as the insertion loss for a channel at the
package side (e.g. ch1 to ch16) is nearly identical with the center channels (e.g. ch4 to
ch13). Typical measurements results are shown in
devices.
The IP425x family is mainly designed as EMI/RFI filters for multi-channel interfaces. The
selection of one of the filter devices has to be performed dependent on the maximum
clock frequency, driver strength, capacitive load of the sink, and also the maximum
applicable rise and fall times.
The Secure Digital High Capacity (SDHC) memory card interface standard specification
and the MultiMediaCard (MMC) (JESD 84A43) standard specification recommend a rise
and fall time of 25 % to 62.5 % (62.5 % to 25 % respectively) of 3 ns or less for the input
signal of the receiving interface side.
Assuming a typical capacitance of about 20 pF for the SDHC memory card itself, and
approximately 4 pF to 7 pF for the PCB and the card holder, IP4252CZ12-6 (6 channels,
R
all relevant interface pins such as CLK, CMD, and DAT0 to DAT3/CD. Please refer to
Figure 7
interface.
In case additional channels such as write-protect or a mechanical card detection switch
are used, the IP4252CZ16-8 (8 channels, R
offers two additional channels.
10
s(ch)
= 40 , C
10
for a general example of the implementation of the IP4252 in an SD(HC) card
2
10
ch
(1)
(2)
3
001aaj610
f (MHz)
= 12 pF at V
10
4
Rev. 03 — 6 May 2009
bias(DC)
Integrated 4-, 6- and 8-channel passive filter network
Fig 6.
= 2.5 V) is a matching selection to filter and protect
(dB)
S
(1) IP4254CZ16 - ch4 to ch13
(2) IP4254CZ16 - ch1 to ch16
21
10
20
30
40
50
0
10
IP4254 frequency response curves
s(ch)
1
= 40 , C
1
Figure 3
IP4251/52/53/54
10
ch
to
= 12 pF at V
Figure 6
10
2
© NXP B.V. 2009. All rights reserved.
10
for the different
(1)
(2)
bias(DC)
3
001aaj611
f (MHz)
10
4
= 2.5 V)
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