ICS9P936AFLF IDT, Integrated Device Technology Inc, ICS9P936AFLF Datasheet - Page 5

• Manufacturer Part Number: ICS9P936AFLF
• Description: IC FANOUT/BUFF DDR I/II 28TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS9P936AFLF

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT
T
Period jitter
Half-period jitter
Cycle to Cycle
Dynamic Phase Offset
Static Phase Offset
Output to Output Skew
Output Duty Cycle
Output clock slew rate
1. Switching characteristics guaranteed for operating frequency range
T
Max clock frequency
Application Frequency Range
Input clock duty cycle
CLK stabilization
Switching Characteristics (VDDQ2.5/1.8 = 1.8V +/- 0.1V) (see note 1)
Timing Requirements VDDQ2.5/1.8 = 1.8 V +/- 0.1V
A
A
ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
TM
= 0 - 70°C; Supply Voltage AVDD = 2.5V+/-0.2V, VDDQ2.5/1.8 = 1.8 V +/- 0.1V (unless otherwise stated)
= 0 - 70°C Supply Voltage AVDD2.5 = 2.5V+/-0.2V (unless otherwise stated)
/ICS
PARAMETER
TM
Low Skew Dual Bank DDR I/II Fan-out Buffer
PARAMETER
SYMBOL
T
T
T
cyc
T
T
(jit_hper)
SYMBOL
t
t
jit (per)
t
(DPO)
(SPO)
skew
duty
freq
sl(i)
freq
-T
T
d
STAB
cyc
tin
App
op
Period jitter
Half period jitter
Cycle to Cycle jitter
DDR(0:5)
Measured from 20% to 80% of
VDDQ
CONDITIONS
CONDITION
5
125
160
-40
40
SPECIFICATION
MAX
400
400
60
15
MIN
-40
-60
-40
-50
-50
1.5
47
SPECIFICATION
UNITS
MHz
MHz
TYP
µs
%
0
MAX UNITS
40
60
40
50
50
40
53
3
1084C 12/03/09
V/ns
ps
ps
ps
ps
ps
ps
ps