ISL12020MIRZ-T7A Intersil, ISL12020MIRZ-T7A Datasheet - Page 25

IC RTC/CALENDAR TEMP SNSR 20DFN

ISL12020MIRZ-T7A

Manufacturer Part Number
ISL12020MIRZ-T7A
Description
IC RTC/CALENDAR TEMP SNSR 20DFN
Manufacturer
Intersil
Type
Clock/Calendarr
Datasheet

Specifications of ISL12020MIRZ-T7A

Memory Size
128B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ALPHA Hot Register (ALPHAH)
The ALPHA Hot variable is 7 bits and is defined as the
temperature coefficient of Crystal from the XT0 value to
+85°C (both Alpha Hot and Alpha Cold must be
ADDR 7
2Dh
D
XT<4:0>
ALP_H6 ALP_H5 ALP_H4 ALP_H3 ALP_H2 ALP_H1 ALP_H0
TABLE 25. ALPHA HOT REGISTER
01111
01110
01101
01100
01011
01010
01001
01000
00111
00110
00101
00100
00011
00010
00001
00000
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
6
TABLE 24. XT0 VALUES
5
25
4
3
TEMPERATURE
TURNOVER
2
32.5
32.0
31.5
30.5
29.5
29.0
28.5
28.0
27.5
27.0
26.5
26.0
25.5
25.0
25.0
24.5
24.0
23.5
23.0
22.5
22.0
21.5
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
31
30
1
ISL12020M
0
programmed to provide full temperature
compensation). It is normally given in units of ppm/°C
with a typical value of -0.034. Like the ALPHA Cold
version, a scaled version of the absolute value of this
coefficient is used in order to get an integer value.
Therefore, ALP_H<7:0> is defined as the (|Actual Alpha
Hot Value| x 2048) and converted to binary. For
example, a crystal with Alpha Hot of -0.034ppm/°C
first scaled (|2048*(-0.034)| = 70d) and then
converted to a binary number of 01000110b.
The practical range of Actual ALPHAH values is from
-0.020 to -0.060.
The ISL12020M has a preset ALPHAH value
corresponding to the crystal in the module. This value is
recalled on initial power-up and should never be changed
for best temperature compensation performance,
although the user may override this preset value if so
desired.
The ALPHAH register should only be changed while the
TSE (Temp Sense Enable) bit is “0”.
User Registers (Accessed by
Using Slave Address
1010111x)
Addresses [00h to 7Fh]
These registers are 128 bytes of battery-backed user
SRAM. The separate I
read and write to these registers.
I
The ISL12020M supports a bi-directional bus oriented
protocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is the
master and the device being controlled is the slave. The
master always initiates data transfers and provides the
clock for both transmit and receive operations.
Therefore, the ISL12020M operates as a slave device in
all applications.
All communication over the I
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (see
Figure 15). On power-up of the ISL12020M, the SDA pin
is in the input mode.
2
C Serial Interface
2
C slave address must be used to
2
C interface is conducted by
February 11, 2010
FN6667.4
2
is
2
,

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