RX-4801JE:UB Epson Toyocom Corporation, RX-4801JE:UB Datasheet - Page 20
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RX-4801JE:UB
Manufacturer Part Number
RX-4801JE:UB
Description
REAL TIME CLOCK MODULE
Manufacturer
Epson Toyocom Corporation
Specifications of RX-4801JE:UB
Memory Size
*
Time Format
*
Date Format
*
Interface
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5730413A
RX - 4801 SA / JE
8.4. Time Update Interrupt Function
8.4.1. Time update interrupt function diagram
The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to
the timing of the internal clock.
When an interrupt event occurs, the UF bit value becomes "1" and the /INT pin goes to low level to indicate that an
event has occurred. (However, when a fixed-cycle timer interrupt event has been generated, low-level output from
the /INT pin occurs only when the value of the control register's UIE bit is "1". This /INT status is automatically
cleared (/INT status changes from low level to Hi-Z) 7.8 ms (fixed value) after the interrupt occurs.
(1) A time update interrupt event occurs when the internal clock's value matches either the second update time or
(2) When a time update interrupt event occurs, the UF bit value becomes "1".
(3) When the UF bit value is "1" its value is retained until it is cleared to zero.
(4) When a time update interrupt occurs, /INT pin output is low if UIE = "1".
(5) Each time an event occurs, /INT pin output is low only up to the tRTN time (which is fixed as 7.1825 ms for
(6) As long as /INT = low, the /INT pin status does not change, even if the UF bit value changes from "1" to "0".
(7) When /INT = low, the /INT pin status changes from low to Hi-Z as soon as the UIE bit value changes from "1"
∗
example
UIE bit
/INT output
UF bit
Events
/INT operation
the minute update time. The USEL bit's specification determines whether it is the second update time or the
minute update time that must be matched.
∗ If UIE = "0" when a timer update interrupt occurs, the /INT pin status remains Hi-Z.
time update interrupts) after which it is automatically cleared to Hi-Z.
∗ /INT pin output goes low again when the next interrupt event occurs.
to "0".
i '
Operation in RTC
Write operation
i
UIE = " 1 "
period
(4)
(2)
" 1 "
tRTN
(1)
(5)
period
(3)
period
Page - 17
7.8ms
tRTN
(6)
∗ /INT status does not
change when UF bit is
cleared to zero.
period
tRTN
UIE = " 1 " → " 0 "
(7)
period
tRTN
ETM27E-04
" 1 "
" 0 "
Hi - z
" L "
" 1 "
" 0 "