XC3S1400AN-4FGG484I Xilinx Inc, XC3S1400AN-4FGG484I Datasheet - Page 75

• Manufacturer Part Number: XC3S1400AN-4FGG484I
• Description: IC FPGA SPARTAN-3AN 484FPGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S1400AN-4FGG484I

• Number Of Logic Elements/cells: 25344
• Number Of Labs/clbs: 2816
• Total Ram Bits: 589824
• Number Of I /o: 372
• Number Of Gates: 1400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
Sector Protection Register Erase
R
Table 8-3: Sector Protection Register (one control byte per sector)
Table 8-4: Sector 0a and Sector 0b Protection Settings (Byte 0 in
The
Protection Register Erase command sequence to erase the register.
To issue the Sector Protection Register Erase command sequence, the FPGA application
must perform the following actions using the SPI_ACCESS design primitive.
•
•
Sectors 0a and 0b unprotected
Protect Sector 0a
Protect Sector 0b
Protect both Sector 0a and
Sector 0b
XC3S50AN
Drive CSB Low while CLK is High or on the rising edge of CLK.
On the falling edge of CLK, serially clock in the four-byte Sector Protection Register
Erase command sequence shown in
each byte first.
Sector Protection Register
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Sector Function
◆
◆
◆
◆
Available Sectors
XC3S200AN
XC3S400AN
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
◆
◆
◆
◆
◆
◆
◆
◆
www.xilinx.com
XC3S1400AN
must be erased before it can be programmed. Use the Sector
XC3S700AN
Sector 0a
7
0
1
0
1
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
Table 8-5
6
0
1
0
1
Sector 0b
Control Byte
5
0
0
1
1
0 (special)
on the MOSI pin, most-significant bit of
Sector/
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
4
0
0
1
1
X
X
X
X
3
Don’t Care
PROTECT
X
X
X
X
2
0xFF
Protection Status
(see
Table
Sector Protection
X
X
X
X
1
Table
0
X
X
X
X
8-3)
8-4)
OPEN
0x00
Value
0x00
0xC0
0x30
0xF0
Hex
75