PIC18LF26K80-I/SS Microchip Technology, PIC18LF26K80-I/SS Datasheet - Page 75
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18LF26K80-I/SS
Manufacturer Part Number
PIC18LF26K80-I/SS
Description
MCU PIC 64KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18LF26K80-I/SS
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP (0.200", 5.30mm Width)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Processor Series
PIC18LF26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 4-1:
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
Only implemented on devices with 64 pins (PIC18F6XK80, PIC18LF6XK80).
Unimplemented: Read as ‘0’
MODMD: Modulator Output Module Disable bit
1 = The modulator output module is disabled. All Modulator Output registers are held in Reset and
0 = The modulator output module is enabled
ECANMD: Enhanced CAN Module Disable bit
1 = The Enhanced CAN module is disabled. All Enhanced CAN registers are held in Reset and are
0 = The Enhanced CAN module is enabled
CMP2MD: Comparator 2 Module Disable bit
1 = The Comparator 2 module is disabled. All Comparator 2 registers are held in Reset and are not
0 = The Comparator 2 module is enabled
CMP1MD: Comparator 1 Module Disable bit
1 = The Comparator 1 module is disabled. All Comparator 1 registers are held in Reset and are not
0 = The Comparator 1 module is enabled
are not writable.
not writable.
writable.
writable.
U-0
—
PMD2: PERIPHERAL MODULE DISABLE REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
MODMD
R/W-0
(1)
ECANMD
R/W-0
x = Bit is unknown
CMP2MD
R/W-0
DS39977C-page 75
CMP1MD
R/W-0
bit 0
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