STM32F101T6U6ATR STMicroelectronics, STM32F101T6U6ATR Datasheet - Page 57

• Manufacturer Part Number: STM32F101T6U6ATR
• Description: IC ARM CORTEX MCU 32KB 36VFQFPN
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F101T6U6ATR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 36MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 26
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 36-VFQFN Exposed Pad
• Core: ARM Cortex M3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

STM32F101x4, STM32F101x6
5.3.14
Figure 26. I/O AC characteristics definition
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 37.
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
Figure 27. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
V
V
V
V
V
Table
NF(NRST)
IH(NRST)
IL(NRST)
Symbol
F(NRST)
the series resistance must be minimum
Table 37
hys(NRST)
R
PU
8.
(1)
(1)
(1)
(1)
PU
. Otherwise the reset will not be taken into account by the device.
External
reset circuit
NRST pin characteristics
(see
EXT ERNAL
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
OUTPUT
ON 50pF
Maximum frequency is achieved if (t r + t f ) ≤ 2/3)T and if the duty cycle is (45-55%)
Table
(1)
0.1 µF
34).
Parameter
t r(I O)out
NRST
Doc ID 15058 Rev 5
(2)
(~10% order)
10%
V DD
50%
when loaded by 50pF
R PU
90%
.
(2)
Conditions
V
DD
IN
T
10%
=
supply voltage conditions summarized
Table 37
V
SS
50%
Filter
90%
t r(I O)out
STM32F10x
–0.5
Min
300
30
Internal reset
2
are derived from tests
IL(NRST)
Electrical characteristics
max level specified in
Typ
200
40
ai14132d
V
DD
Max
100
0.8
50
+0.5
ai14131
Unit
to
57/79
mV
kΩ
ns
ns
V