MC56F8257VLH Freescale Semiconductor, MC56F8257VLH Datasheet - Page 8

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257VLH

Manufacturer Part Number
MC56F8257VLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257VLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
64LQFP
Family Name
MC56F82xx
Maximum Speed
60 MHz
Data Bus Width
16 Bit
Interface Type
CAN/I2C/SCI/SPI
On-chip Dac
1-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Features
2.5
The following is a brief summary of the peripheral modules.
2.5.1
8
Large regulator standby mode available for reducing power consumption at low-speed mode
Less than 30 µs typical wakeup time from stop modes
Each peripheral can be individually disabled to save power
One enhanced Flex pulse width modulator (eFlexPWM) module
— Up to nine output channels
— Sixteen bits of resolution for center, edge aligned, and asymmetrical PWMs
— Each complementary pair can operate with its own PWM frequency-based and deadtime values
— PWM outputs can operate as complementary pairs or independent channels
— Independent control of both edges of each PWM output
— 6-channel NanoEdge high resolution PWM
— 3-channel PWM with full input capture features
— Support for synchronization to external hardware or other PWM
— Double buffered PWM registers
— Multiple output trigger events can be generated per PWM cycle via hardware
— Support for double switching PWM outputs
— Up to four fault inputs can be assigned to control multiple PWM outputs
— Independently programmable PWM output polarity
— Individual software control for each PWM output
— All outputs can be programmed to change simultaneously via a FORCE_OUT event
— PWMX pin can optionally output a third PWM signal from each submodule
— Channels not used for PWM generation can be used for buffered output compare functions
— Channels not used for PWM generation can be used for input capture functions
Module features
– 4 Time base
– Independent top and bottom deadtime insertion
– Fractional delay for enhanced resolution of the PWM period and edge placement
– Arbitrary eFlexPWM edge placement—PWM phase shifting
– NanoEdge implementation: 520 ps PWM frequency resolution
– Three PWM channels: PWMA, PWMB, and PWMX
– Enhanced input capture functionality
– Integral reload rates from one to sixteen
– Half cycle reload capability
– Programmable filters for fault inputs
eFlexPWM
MC56F825x/MC56F824x Product Brief, Rev. 2
Preliminary
Freescale Semiconductor

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