IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 7
IDT82P5088BBG
Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82P5088BBG.pdf
(81 pages)
Specifications of IDT82P5088BBG
Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
170
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
20 000
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Table-71
List Of Tables
IDT82P5088
TIE1 MODE: T1 or E1 Mode Select Register................................................................ 44
TJACF: Jitter Attenuator Configuration Register for Transmit Path .............................. 44
TCF0: Transmitter Configuration Register 0 for Transmit Path..................................... 44
TCF1: Transmitter Configuration Register 1 for Transmit Path..................................... 45
TCF2: Transmitter Configuration Register 2 for Transmit Path..................................... 46
TCF3: Transmitter Configuration Register 3 for Transmit Path..................................... 46
TCF4: Transmitter Configuration Register 4 for Transmit Path..................................... 46
RJACF: Jitter Attenuator Configuration Register for Receive Path............................... 47
RCF0: Receiver Configuration Register 0 for Receive Path ......................................... 47
RCF1: Receiver Configuration Register 1 for Receive Path ......................................... 48
RCF2: Receiver Configuration Register 2 for Receive Path ......................................... 49
MAINT0: Maintenance Function Control Register 0...................................................... 49
MAINT1: Maintenance Function Control Register 1...................................................... 49
MAINT2: Maintenance Function Control Register 2...................................................... 50
MAINT3: Maintenance Function Control Register 3...................................................... 50
MAINT4: Maintenance Function Control Register 4...................................................... 51
MAINT5: Maintenance Function Control Register 5...................................................... 51
MAINT6: Maintenance Function Control Register 6...................................................... 51
TERM: Transmit and Receive Termination Configuration Register .............................. 52
INTENC0: Interrupt Mask Register 0 ............................................................................ 52
INTENC1: Interrupt Mask Register 1 ............................................................................ 53
INTES: Interrupt Trigger Edges Select Register ........................................................... 54
STAT0: Line Status Register 0 (real time status monitor)............................................. 55
STAT1: Line Status Register 1 (real time status monitor)............................................. 57
TJITT: Jitter Measure Value Indicate Register (Transmit Path) .................................... 57
TJITT: Jitter Measure Value Indicate Register (Receive Path) ..................................... 57
INTS0: Interrupt Status Register 0 ................................................................................ 58
INTS1: Interrupt Status Register 1 ................................................................................ 59
CNTL: Error Counter L-byte Register 0......................................................................... 59
CNTH: Error Counter H-byte Register 1 ....................................................................... 59
REFC: E1 Reference Clock Output Control .................................................................. 59
Instruction Register Description .................................................................................... 61
Device Identification Register Description..................................................................... 61
TAP Controller State Description .................................................................................. 62
JTAG Timing Characteristics ........................................................................................ 75
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
7
February 5, 2009