SC16C852LIBS,128 NXP Semiconductors, SC16C852LIBS,128 Datasheet - Page 12

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SC16C852LIBS,128

Manufacturer Part Number
SC16C852LIBS,128
Description
IC UART DUAL W/FIFO 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C852LIBS,128

Features
Programmable
Number Of Channels
2, DUART
Fifo's
128 Byte
Protocol
RS485
Voltage - Supply
2.5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
With Parallel Port
-
NXP Semiconductors
SC16C852L
Product data sheet
6.1 UART A-B functions
6.2 Extended mode (128-byte FIFO)
The SC16C852L is capable of operation up to 5 Mbit/s with an external 80 MHz clock.
With a crystal, the SC16C852L is capable of operation up to 1.5 Mbit/s.
The rich feature set of the SC16C852L is available through internal registers. These
features are: selectable and programmable receive and transmit FIFO trigger levels,
selectable TX and RX baud rates, and modem interface controls, and are all standard
features. Following a power-on reset, an external reset, or a software reset, the
SC16C852L is software compatible with the previous generation, SC16C2550,
SC16C652B, and ST16C2450.
The UART provides the user with the capability to bidirectionally transfer information
between an external CPU, the SC16C852L package, and an external serial device. A
logic 0 (LOW) on chip select pins CSA and/or CSB allows the user to configure, send
data, and/or receive data via UART channels A, B. Individual channel select functions are
shown in
Table 3.
H = HIGH; L = LOW.
Table 4.
H = HIGH; L = LOW.
The device is in the extended mode when any of these four registers contains any value
other than 0: FLWCNTH, FLWCNTL, TXINTLVL, RXINTLVL.
Chip Select
CSA = L
Chip Select
CS = L, A3 = H
CSA = H, CSB = H
CSB = L
CS = H
CS = L, A3 = L
Table 3
Serial port selection (Intel interface)
Serial port selection (Motorola interface)
All information provided in this document is subject to legal disclaimers.
and
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
Table
Function
none
UART channel A
UART channel B
Function
none
UART channel A
UART channel B
Rev. 4 — 1 February 2011
4.
SC16C852L
© NXP B.V. 2011. All rights reserved.
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