74AVC20T245DGG,118 NXP Semiconductors, 74AVC20T245DGG,118 Datasheet
74AVC20T245DGG,118
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74AVC20T245DGG,118 Summary of contents
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Rev. 4 — 24 November 2010 1. General description The 74AVC20T245 is a 20-bit, dual supply transceiver that enables bi-directional voltage level translation. The device can be used as ...
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... NXP Semiconductors 120 Mbit/s ( 1 1.5 V translation) 100 Mbit/s ( 1 1.2 V translation) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V I OFF Multiple package options Specified from 40 C to +85 C and 40 C to +125 C ...
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... NXP Semiconductors CC(A) CC(B) 1OE 56 1DIR 1 1A1 CC(A) CC(B) 2OE 29 2DIR 28 2A1 42 Pin numbers are shown for TSSOP56 packages only. Fig 2. Logic symbol 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver; 3-state 1B1 1B2 1B3 1B4 1A2 1A3 1A4 1A5 ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. Pin configuration SOT364-1 (TSSOP56) and SOT481-2 (TSSOP56) 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver; 3-state 74AVC20T245 1 1DIR 1B1 2 1B2 3 GND 4 5 1B3 6 1B4 V 7 CC(B) 1B5 8 1B6 9 10 1B7 11 GND 1B8 12 1B9 ...
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... NXP Semiconductors (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SOT1134-1 (HXQFN60U) 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin SOT364-1 and SOT481-2 1DIR, 2DIR 1, 28 1B1 to 1B10 10, 12, 13, 14 2B1 to 2B10 15, 16, 17, 19, 20, 21, 23, 24, 26, 27 [1] GND 4, 11, 18, 25, 32, 39, 46 CC(B) 1OE, 2OE 56, 29 1A1 to 1A10 55, 54, 52, 51, 49, 48, 47, 45, ...
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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage A CC(A) V supply voltage B CC(B) I input clamping current IK V input voltage I I output clamping current OK V output voltage ...
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... NXP Semiconductors 9. Static characteristics Table 6. Typical static characteristics recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ I power-off leakage current OFF C input capacitance ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level data input IL input voltage V CCI V CCI V CCI V CCI nDIR, nOE input V CC(A) V CC(A) V CC(A) V CC(A) V HIGH-level output voltage = 100 CC(A) = 3 mA; ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I power-off A port; V OFF leakage V CC(A) current B port CC(B) I supply current A port CC(A) V CC(B) V CC(A) V CC(B) V CC(A) V CC(A) B port CC(A) V CC(B) V CC(A) V CC(B) V CC(A) V CC(A) ...
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... NXP Semiconductors 10. Dynamic characteristics Table 9. Typical power dissipation capacitance at V Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C power dissipation A port: (direction A to B); PD capacitance output enabled A port: (direction A to B); output disabled A port: (direction B to A); output enabled A port: (direction B to A); ...
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... NXP Semiconductors Table 10. Typical dynamic characteristics at V Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t propagation delay nAn to nBn pd nBn to nAn t disable time nOE to nAn dis nOE to nBn t enable time nOE to nAn en nOE to nBn [ the same as t and t ...
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... NXP Semiconductors Dynamic characteristics for temperature range 40 C to +85 C Table 12. Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 1.3 V CC(A) t propagation nAn to nBn pd delay nBn to nAn t disable time nOE to nAn dis nOE to nBn ...
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... NXP Semiconductors Dynamic characteristics for temperature range 40 C to +125 C Table 13. Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 1.3 V CC(A) t propagation nAn to nBn pd delay nBn to nAn t disable time nOE to nAn dis nOE to nBn ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 5. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in ...
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... NXP Semiconductors Test data is given in Table R = Load resistance Load capacitance including jig and probe capacitance Termination resistance External voltage for measuring switching times. V EXT Fig 7. Load circuit for switching times Table 15. Test data Supply voltage Input [ CC(A) CC( CCI 1. 2.7 V ...
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... NXP Semiconductors 12. Typical propagation delay characteristics (ns Propagation delay (nAn to nBn 0.8 V. CC(B) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 8. Typical propagation delay versus load capacitance; T 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver; 3-state 001aai476 t pd ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay (nAn to nBn 1.2 V CC( PLH (ns LOW to HIGH propagation delay (nAn to nBn 1.5 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 9. Typical propagation delay versus load capacitance; T 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay (nAn to nBn 1.8 V CC( PLH (ns LOW to HIGH propagation delay (nAn to nBn 2.5 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 10. Typical propagation delay versus load capacitance; T 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay (nAn to nBn 3.3 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 11. Typical propagation delay versus load capacitance; T 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver; 3-state 001aai485 t PHL ...
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... NXP Semiconductors 13. Package outline TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HXQFN60U: plastic thermal enhanced extremely thin quad flat package; no leads; 60 terminals; UTLP based; body 0.5 mm terminal 1 index area A10 terminal 1 index area D1 Dimensions Unit max 0.50 0.05 0.35 4.1 mm nom 0.48 0.02 0.30 4.0 min 0.46 0.00 0.25 3.9 ...
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... NXP Semiconductors 14. Abbreviations Table 16. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 17. Revision history Document ID Release date 74AVC20T245 v.4 20101124 • Modifications: Figure note [1] 74AVC20T245 v.3 20100622 74AVC20T245 v ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AVC20T245 Product data sheet 20-bit dual supply translating transceiver ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 Functional description . . . . . . . . . . . . . . . . . . . 6 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 11 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 12 Typical propagation delay characteristics . . 17 13 Package outline ...