74LVC8T245PW,118 NXP Semiconductors, 74LVC8T245PW,118 Datasheet - Page 10

• Manufacturer Part Number: 74LVC8T245PW,118
• Description: TXRX 8BIT TRANSLATING 24TSSOP
• Manufacturer: NXP Semiconductors

Specifications of 74LVC8T245PW,118

• Logic Family: 74LVC
• Number Of Channels Per Chip: 2
• Propagation Delay Time: 5.4 ns, 8.9 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.2 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TSSOP-24
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5280-2

NXP Semiconductors
10. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
Table 9.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
Table 10.
Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74LVC_LVCH8T245
Product data sheet
Symbol Parameter
t
t
t
Symbol Parameter
t
t
t
Symbol Parameter
C
pd
dis
en
pd
dis
en
PD
t
t
C
P
f
f
C
V
N = number of inputs switching;
(C
f
pd
pd
i
o
i
D
CC
PD
= input frequency in MHz;
L
= 10 MHz; V
= output frequency in MHz;
is the same as t
is the same as t
= load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
 V
propagation delay
disable time
enable time
propagation delay
disable time
enable time
power dissipation
capacitance
PD
Typical dynamic characteristics at V
Typical dynamic characteristics at V
Typical power dissipation capacitance at V
CC
 V
2
 f
CC
I
o
= GND to V
2
) = sum of the outputs.
 f
PLH
PLH
i
 N + (C
and t
and t
CC
PHL
PHL
; t
Conditions
A port: (direction A to B);
B port: (direction B to A)
A port: (direction B to A);
B port: (direction A to B)
L
; t
; t
r
 V
= t
dis
dis
Conditions
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
Conditions
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
f
CC
is the same as t
is the same as t
= 1 ns; C
2
 f
o
All information provided in this document is subject to legal disclaimers.
) where:
L
= 0 pF; R
Rev. 2 — 11 February 2011
PLZ
PLZ
CC(A)
CC(B)
and t
and t
L
=  .
= 1.2 V and T
= 1.2 V and T
D
CC(A)
PHZ
PHZ
in W).
74LVC8T245; 74LVCH8T245
1.2 V
1.2 V
10.2
13.5
13.6
10.2
13.5
13.6
11.0
11.0
11.0
11.0
9.5
9.5
; t
; t
en
en
= V
is the same as t
is the same as t
1.8 V
CC(B)
Figure
Figure
8-bit dual supply translating transceiver; 3-state
13
1
1.5 V
1.5 V
amb
10.0
13.5
10.3
amb
10.0
12.5
8.5
9.5
8.2
8.5
6.8
9.1
9.0
and T
7; for waveforms see
7; for waveforms see
= 25 C
= 25 C
amb
PZL
PZL
1.8 V
1.8 V
2.5 V
13.5
12.0
V
7.4
9.5
9.5
7.8
8.9
9.5
7.3
5.4
8.6
6.9
13
[1]
[1]
= 25 C
1
CC(A)
and t
and t
V
V
CC(B)
CC(A)
PZH
PZH
and V
[1][2]
2.5 V
2.5 V
.
.
13.5
11.5
6.2
9.1
9.5
6.7
7.5
9.1
6.2
3.8
8.1
4.8
CC(B)
3.3 V
Figure 5
Figure 5
13
1
3.3 V
3.3 V
13.5
11.4
5.7
8.9
9.5
7.3
7.1
8.9
5.7
4.1
7.8
3.8
© NXP B.V. 2011. All rights reserved.
and
and
5.0 V
Figure
Figure
13
5.0 V
5.0 V
2
13.5
11.4
5.4
8.9
9.5
6.4
7.0
8.8
5.4
3.1
7.8
3.2
6.
6.
10 of 28
Unit
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
Unit
pF
pF