NAND512W3A2SN6E NUMONYX, NAND512W3A2SN6E Datasheet - Page 14

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NAND512W3A2SN6E

Manufacturer Part Number
NAND512W3A2SN6E
Description
IC FLASH 512MBUT 48TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of NAND512W3A2SN6E

Format - Memory
FLASH
Memory Type
FLASH - NAND
Memory Size
512M (64M x 8)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-

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Signal descriptions
14/51
Table 5.
R
W
WP
RB
Supply
V
V
DD
SS
Symbol
Signal descriptions (continued)
Input
Input
Input
Output
Supply voltage
Ground
Type
210403 - Rev 2
The Read Enable, R, controls the sequential data output
during read operations. Data is valid t
edge of R. The falling edge of R also increments the
internal column address counter by one.
The Write Enable input, W, controls writing to the
command interface, input address and data latches. Both
addresses and data are latched on the rising edge of Write
Enable.
During power-up and power-down a recovery time of 10 µs
(min) is required before the command interface is ready to
accept a command. It is recommended to keep Write
Enable High during the recovery time.
The Write Protect pin is an input that gives a hardware
protection against unwanted program or erase operations.
When Write Protect is Low, V
any program or erase operations.
It is recommended to keep the Write Protect pin Low, V
during power-up and power-down.
The Ready/Busy output, RB, is an open-drain output that
can be used to identify if the P/E/R controller is currently
active.
When Ready/Busy is Low, V
operation is in progress. When the operation completes
Ready/Busy goes High, V
The use of an open-drain output allows the Ready/Busy
pins from several memories to be connected to a single
pull-up resistor. A Low will then indicate that one, or more,
of the memories is busy.
During power-up and power-down a recovery time of 10 µs
(min) is required before the command interface is ready to
accept a command. During the recovery time the RB signal
is Low, V
Refer to the
characteristics
the pull-up resistor.
V
memory device. It is the main power supply for all
operations (read, program and erase).
An internal voltage detector disables all functions
whenever V
Data
program/erase operations during power-transitions.
Ground, V
be connected to the system ground.
DD
provides the power supply to the internal core of the
protection) to protect the device from any involuntary
OL
SS,
.
DD
Section 10.1: Ready/Busy signal electrical
is the reference for the power supply. It must
is below the V
for details on how to calculate the value of
Description
OH
OL
.
IL
LKO
, the device does not accept
Numonyx SLC SP 70 nm
, a read, program or erase
threshold (see
RLQV
after the falling
Figure 34:
IL
,

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