CY7C1520KV18-200BZC Cypress Semiconductor Corp, CY7C1520KV18-200BZC Datasheet - Page 26
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CY7C1520KV18-200BZC
Manufacturer Part Number
CY7C1520KV18-200BZC
Description
IC SRAM 72MBIT 200MHZ 165-FPBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1518KV18-250BZC.pdf
(33 pages)
Specifications of CY7C1520KV18-200BZC
Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
72M (2M x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-LFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1520KV18-200BZC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Characteristics
Over the Operating Range
Notes
Document Number: 001-00437 Rev. *J
Parameter
Output Times
t
t
t
t
t
t
t
t
t
t
PLL Timing
t
t
t
23. These parameters are extrapolated from the input timing parameters (t
24. t
25. At any voltage and temperature t
CO
DOH
CCQO
CQOH
CQD
CQDOH
CQH
CQHCQH
CHZ
CLZ
KC Var
KC lock
KC Reset
Cypress
design and are not tested in production.
CHZ
, t
CLZ
are specified with a load capacitance of 5 pF as in (b) of
t
t
t
t
t
t
t
t
t
t
t
t
t
Consortium
CHQV
CHQX
CHCQV
CHCQX
CQHQV
CQHQX
CQHCQL
CQHCQH
CHQZ
CHQX1
KC Var
KC lock
KC Reset
Parameter
C/C clock rise (or K/K in single clock
mode) to data valid
Data output hold after output C/C
clock rise (Active to Active)
C/C clock rise to echo clock valid
Echo clock hold after C/C clock rise –0.45
Echo clock high to data valid
Echo clock high to data invalid
Output clock (CQ/CQ) HIGH
CQ clock rise to CQ clock rise (rising
edge to rising edge)
Clock (C/C) rise to High-Z
(Active to High-Z)
Clock (C/C) rise to Low-Z
Clock phase jitter
PLL lock time (K, C)
K static to PLL reset
[20, 21]
CHZ
is less than t
(continued)
Description
CLZ
[24, 25]
and t
[23]
CHZ
[24, 25]
less than t
[23]
AC Test Loads and
CYC
CO
/2 - 250 ps, where 250 ps is the internal jitter). These parameters are only guaranteed by
–0.25
–0.45
–0.45
1.25
1.25
Min Max Min Max Min Max Min Max Min Max
.
333 MHz
20
30
–
–
–
–
–
0.45
0.45
0.25
0.45
0.20
–
–
–
–
–
–
–
–
Waveforms. Transition is measured ±100 mV from steady-state voltage.
–0.45
–0.45
–0.27
–0.45
1.40
1.40
300 MHz
20
30
–
–
–
–
–
CY7C1516KV18, CY7C1527KV18
CY7C1518KV18, CY7C1520KV18
0.45
0.45
0.27
0.45
0.20
–
–
–
–
–
–
–
–
–0.45
–0.45
–0.30
–0.45
1.75
1.75
250 MHz
20
30
–
–
–
–
–
0.45
0.30
0.45
0.20
0.45
–
–
–
–
–
–
–
–
–0.45
–0.45
–0.35
–0.45
2.25
2.25
200 MHz
20
30
–
–
–
–
–
0.45
0.45
0.35
0.45
0.20
–
–
–
–
–
–
–
–
–0.50
–0.50
–0.40
–0.50
2.75
2.75
167 MHz
20
30
–
–
–
–
–
Page 26 of 33
0.50
0.50
0.40
0.50
0.20
–
–
–
–
–
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
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