TEA1753LT/N1,518 NXP Semiconductors, TEA1753LT/N1,518 Datasheet - Page 19

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TEA1753LT/N1,518

Manufacturer Part Number
TEA1753LT/N1,518
Description
IC CTLR SMPS SW MODE 16SO
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TEA1753LT/N1,518

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
TEA1753LT
Product data sheet
7.3.10 Overpower protection
7.3.11 Driver (FBDRIVER pin)
7.3.9 Overcurrent protection (FBSENSE pin)
The primary peak current in the transformer is measured accurately cycle-by-cycle using
the external sense resistor R
an internal level (see also
leading edge blanking period, t
During the primary stroke of the flyback converter the input voltage of the flyback
converter is measured by sensing the current that is drawn from the pin FBAUX.
The current information is used to adjust the peak drain current of the flyback converter,
which is measured via pin FBSENSE. The internal compensation is such, that a maximum
output power can be realized that is almost independent of the input voltage.
The OPP curve is given in
The driver circuit to the gate of the external power MOSFET has a current sourcing
capability of −500 mA and a current sink capability of 1.2 A. This permits fast turn-on and
turn-off of the power MOSFET for efficient operation.
Fig 15. OCP leading edge blanking
Fig 16. Overpower protection curve
All information provided in this document is subject to legal disclaimers.
−360
Rev. 2 — 8 April 2011
Section
Figure
V
OCP level
sense2
FBSENSE
leb
, to prevent false triggering caused by switch-on spikes.
t
leb
16.
. The OCP circuit limits the voltage on pin FBSENSE to
I
7.3.3). The OCP detection is suppressed during the
FBAUX
(μA)
−100
014aaa022
GreenChip III SMPS control IC
t
0
V
(V)
014aaa749
0.46
0.65
FBSENSE
TEA1753LT
© NXP B.V. 2011. All rights reserved.
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