PCF2113AU/10/F4,00 NXP Semiconductors, PCF2113AU/10/F4,00 Datasheet - Page 11

• Manufacturer Part Number: PCF2113AU/10/F4,00
• Description: IC LCD CTRLR/DVR
• Manufacturer: NXP Semiconductors

Specifications of PCF2113AU/10/F4,00

• Display Type: LCD
• Configuration: 5 X 8 (Matrix)
• Interface: I²C
• Voltage - Supply: 2.2 V ~ 4 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: Die
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Current - Supply: -
• Lead Free Status / Rohs Status: Details
• Other names: 935264031005

NXP Semiconductors
PCF2113_FAM_4
Product data sheet
8.3 Oscillator
8.4 External clock
8.5 Power-on reset
8.6 Registers
8.7 Busy flag
Table 6.
[1]
The on-chip oscillator provides the clock signal for the display system. No external
components are required and the OSC pin must be connected to V
If an external clock is to be used, this input is at the OSC pin. The resulting display frame
frequency is given by:
Only in the Power-down mode is the clock allowed to be stopped (pin OSC connected to
V
The on-chip power-on reset block initializes the chip after power-on or power failure. This
is a synchronous reset and requires 3 oscillator cycles to be executed.
The PCF2113x has two 8-bit registers: an Instruction Register (IR) and a Data
Register (DR). The Register Select (RS) signal determines which register will be
accessed. The instruction register stores instruction codes such as ‘display clear’, ‘cursor
shift’, and address information for the Display Data RAM (DDRAM) and Character
Generator RAM (CGRAM). The instruction register can be written to but not read from by
the system controller.
The data register temporarily stores data to be read from the DDRAM and CGRAM. When
reading, data from the DDRAM or CGRAM corresponding to the address in the instruction
register is written to the data register prior to being read by the ‘read data’ instruction.
The busy flag indicates the internal status of the PCF2113x. A logic 1 indicates that the
chip is busy and further instructions will not be accepted. The busy flag is output to
pin DB7 when bit RS = 0 and bit R/W = 1. Instructions must only be written after checking
that the busy flag is at logic 0 or waiting for the required number of cycles.
Multiplex
rate
1:18
1:9
1:2
SS
), otherwise the LCD is frozen in a DC state.
The values in the table are given relative to V
Bias levels as a function of multiplex rate
Number
of levels
5
5
4
f
Bias voltages
V
V
V
V
Rev. 04 — 4 March 2008
fr LCD
1
LCD
LCD
LCD
=
----------- -
3072
V
3
3
2
f
4
4
3
osc
2
[1]
LCD
V
V
1
1
2
SS
2
2
3
3
, e.g.
3
4
means {
V
1
1
1
2
2
3
4
3
4
LCD controllers/drivers
(V
LCD
DD1
V
1
1
1
PCF2113x
4
4
3
5
.
© NXP B.V. 2008. All rights reserved.
V
SS
)} + V
V
V
V
V
SS
6
SS
SS
SS
.
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