FAN73933M Fairchild Semiconductor, FAN73933M Datasheet - Page 16

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FAN73933M

Manufacturer Part Number
FAN73933M
Description
IC GATE DVR HALF BRIDGE 14-SOIC
Manufacturer
Fairchild Semiconductor
Type
Half-Bridge Gate Drive ICr
Datasheet

Specifications of FAN73933M

Configuration
Half Bridge
Input Type
Non-Inverting
Delay Time
160ns
Current - Peak
2.5A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (0.154", 3.90mm Width)
Product
Half-Bridge Drivers
Rise Time
40 ns
Fall Time
20 ns
Propagation Delay Time
160 ns
Supply Voltage (max)
20 V
Supply Voltage (min)
10 V
Supply Current
0.9 mA
Maximum Power Dissipation
1 W
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Driver Configuration
Non-Inverting
Driver Type
High and Low Side
Operating Supply Voltage (max)
20V
Peak Output Current
2.5A
Power Dissipation
1W
Operating Supply Voltage (min)
10V
Turn Off Delay Time
50ns
Turn On Delay Time (max)
50ns
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
14
Package Type
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FAN73933MX
Quantity:
6 000
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Figure 44. 14-Lead, Small Outline Integrated Circuit (SOIC), Non-JEDEC, .150 Inch Narrow Body, 225SOP
NOTES:
A) THIS DRAWING COMPLIES WITH JEDEC MS-012
B) THIS DIMENSION IS OUTSIDE THE JEDEC MS-012 VALUE.
C) ALL DIMENSIONS ARE IN MILLIMETERS.
D) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
E) LANDPATTERN STANDARD: SOIC127P600X145-14M
F) DRAWING FILE NAME AND REVISION : M14CREV1
6.00
INDICATOR
EXCEPT AS NOTED.
AND TIE BAR EXTRUSIONS.
PIN ONE
1.80 MAX
(0.27)
1.65
1.45
B
14
#1
SIDE VIEW
TOP VIEW
1.27
8.76
8.36
7.62
1.27
8
7
0.51
0.36
0.20
0.10 MAX C
A
B
0.05MIN
C
4.15
3.75
C B A
16
B
0.36
LAND PATTERN RECOMMENDATION
(R0.20)
PLANE
1.70
GAGE
#1
SEATING
PLANE
END VIEW
DETAIL A
1.27
SEE DETAIL A
(R0.10)
0.90
0.50
0.65
0.30
0.15
5.60
www.fairchildsemi.com
B

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