SI3482-A01-GM Silicon Laboratories Inc, SI3482-A01-GM Datasheet - Page 8

• Manufacturer Part Number: SI3482-A01-GM
• Description: IC CTLR POE 24-48PORT PSE 24-QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3482-A01-GM

• Applications: Power Over Ethernet Controller
• Current - Supply: 12.1mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-WFQFN Exposed Pad
• Product: Power Distribution
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si3482
The UART interface uses eight data bits, no parity, and one stop bit.
2.1.2. SPI Interface
If the PSLCT pin is tied low, then the Si3482 uses the SPI interface to communicate with the host MCU. The
Si3482 is an SPI slave device. Therefore, it receives data on the MOSI pin and sends data on the MISO pin. The
host MCU drives the NSS and SCK pins.
The SPI interface uses an active-high clock (CKPOL = 0). The clock line is low in the idle state, and the leading
edge of the clock goes from low to high. The SPI interface samples the data on the leading edge of the clock
(CKPHA = 0). The SPI interface transfers the most-significant bit first, and the maximum bit rate is 1 Mbps
2.2. Hardware Only Mode
The host interface (SPI or UART) and the UART baud rate are pin-configured. The Si3482 reads the pin
configuration at power up, and it cannot be changed after power up. The hardware designer only needs to decide
which interface to use and, if UART is selected, which BAUD rate to use.
In general, the host interface must be electrically isolated from the host MCU using an appropriate electrical
isolator for either SPI or UART signals as well as power supply status signals as needed.
The Si3482 backs up its configuration to internal flash memory. Once the Si3482 is configured, it is possible to
disconnect the host interface and use the Si3482 without a host MCU.
To configure the Si3482 when a host MCU is not required or for initial system debug, the USB adapter and Power
Manager GUI supplied with the Si3482 evaluation system, “SMARTPSE24-KIT”, can be adapted to set the device
configuration as desired.
8
BAUD2
H
H
H
H
BAUD1
Table 5. Baud Rates
H
H
L
L
Rev. 0.1
BAUD0
H
H
L
L
Baud Rate (bps)
115200
19200
38400
57600