ISL62881HRTZ-T Intersil, ISL62881HRTZ-T Datasheet - Page 11

• Manufacturer Part Number: ISL62881HRTZ-T
• Description: IC REG PWM SGL PHASE 28TQFN
• Manufacturer: Intersil

Specifications of ISL62881HRTZ-T

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 5 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 V ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Theory of Operation
Multiphase R
FIGURE 7. R
FIGURE 6. R
CLOCK
C LO C K
V C R M
GMVO
VCRM
C O M P
CRS
VCRS
V C R S
PWM
P W M
V W
MASTER
CLOCK
VCRS
FIGURE 5. R
VW
IN LOAD INSERTION RESPONSE
VW
IN STEADY STATE
3™
3™
COMP
VCRM
CRM
3™
MODULATOR OPERATION PRINCIPLES
MODULATOR OPERATION PRINCIPLES
COMP
CLOCK
V W
VW
VW
MASTER CLOCK CIRCUIT
Modulator
3™
GM
SLAVE CIRCUIT
MODULATOR CIRCUIT
11
S
R
Q
PWM
PHASE
CLOCK
H Y S T E R E T IC
W IN D O W
ISL62881, ISL62881B
IL
L
VO
CO
The ISL62881 is a single-phase regulator implementing
Intel
R
modulator combines the best features of fixed frequency
PWM and hysteretic PWM while eliminating many of their
shortcomings. Figure 5 conceptually shows the ISL62881
R
principles.
A current source flows from the VW pin to the COMP pin,
creating a voltage window set by the resistor between
between the two pins. This voltage window is called VW
window in the following discussion.
Inside the IC, the modulator uses the master clock circuit
to generate the clocks for the slave circuit. The
modulator discharges the ripple capacitor C
current source equal to g
C
between the VW and COMP voltages. It resets to VW
when it hits COMP, and generates a one-shot clock
signal.
The slave circuit has its own ripple capacitor C
voltage mimics the inductor ripple current. A g
amplifier converts the inductor voltage into a current
source to charge and discharge C
turns on its PWM pulse upon receiving the clock signal,
and the current source charges C
V
and the current source discharges C
Since the ISL62881 works with V
amplitude and noise-free synthesized signal, the
ISL62881 achieves lower phase jitter than conventional
hysteretic mode and fixed PWM mode controllers. Unlike
conventional hysteretic mode converters, the ISL62881
has an error amplifier that allows the controller to
maintain a 0.5% output voltage accuracy.
Figure 7 shows the operation principles during load
insertion response. The COMP voltage rises during load
insertion, generating the clock signal more quickly, so the
PWM pulse turns on earlier, increasing the effective
switching frequency, which allows for higher control loop
bandwidth than conventional fixed frequency PWM
controllers. The VW voltage rises as the COMP voltage
rises, making the PWM pulse wider. During load release
response, the COMP voltage falls. It takes the master
clock circuit longer to generate the next clock signal so
the PWM pulse is held off until needed. The VW voltage
falls as the VW voltage falls, reducing the current PWM
pulse width. This kind of behavior gives the ISL62881
excellent response speed.
3™
3™
rm
Crs
(Robust Ripple Regulator
®
voltage V
modulator circuit, and Figure 6 shows the operation
hits VW, the slave circuit turns off the PWM pulse,
IMVP-6.5
crm
™
is a sawtooth waveform traversing
protocol. It uses Intersil patented
m
V
o
™
, where g
) modulator. The R
crs
rs
rs
. When C
. The slave circuit
, which is large-
rs
.
m
is a gain factor.
rm
rs
rs
voltage
with a
m
March 9, 2011
, whose
3™
FN6924.2