ISL8036AIRZ-T Intersil, ISL8036AIRZ-T Datasheet - Page 5

• Manufacturer Part Number: ISL8036AIRZ-T
• Description: IC REG SYNC BUCK DUAL 3A 24QFN
• Manufacturer: Intersil
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of ISL8036AIRZ-T

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 V ~ 6 V
• Current - Output: 3A
• Frequency - Switching: 2.5MHz
• Voltage - Input: 2.85 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Configuration
Pin Descriptions
NUMBER
22, 23
1, 24
PIN
10
11
12
13
4
5
6
7
8
9
SYMBOL
PGND2
COMP
SGND
SYNC
LX2
EN2
PG2
FB2
FB1
PG1
EN1
NC
Switching node connection for Channel 2. Connect to one terminal of inductor for VOUT2.
Negative supply for the power stage of Channel 2.
Regulator Channel 2 enable pin. Enable the output, VOUT2, when driven to high. Shutdown the
VOUT2 and discharge output capacitor when driven to low. Do not leave this pin floating.
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal for the
VOUT2 voltage.
The feedback network of the Channel 2 regulator. To be connected to FB1 (current sharing)
An additional external network across COMP and SGND is required to improve the loop compensation
of the amplifier channel parallel operation. The soft-start pin should be tied to the external capacitor.
No connect pin; please tie to GND.
The feedback network of the Channel 1 regulator. FB1 is the negative input to the transconductance
error amplifier. The output voltage is set by an external resistor divider connected to FB1. With a
properly selected divider, the output voltage can be set to any voltage between the power rail
(reduced by converter losses) and the 0.8V reference. There is an internal compensation to meet a
typical application. In addition, the regulator power-good and undervoltage protection circuitry use
FB1 to monitor the Channel 1 regulator output voltage.
System ground.
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal for the
VOUT1 voltage.
Connect to logic high or input voltage VIN . Connect to an external function generator for external
Synchronization. Negative edge trigger. Do not leave this pin floating. Do not tie this pin low (or
to SGND).
Regulator Channel 1 enable pin. Enable the output, VOUT1, when driven to high. Shutdown the
VOUT1 and discharge output capacitor when driven to low. Do not leave this pin floating.
5
VIN2
VIN2
EN2
PG2
LX2
FB2
ISL8036, ISL8036A
1
2
3
4
5
6
24
7
ISL8036, ISL8036A
23
8
(24 LD QFN)
TOP VIEW
22
9
PAD
25
21
10
11
20
DESCRIPTION
12
19
18
17
16
15
14
13
LX1
VIN1
VIN1
VDD
SS
EN1
October 18, 2010
FN6853.1