DP83848I-MAU-EK/NOPB National Semiconductor, DP83848I-MAU-EK/NOPB Datasheet - Page 14
DP83848I-MAU-EK/NOPB
Manufacturer Part Number
DP83848I-MAU-EK/NOPB
Description
EVAL BOARD PHYTER IND TEMP
Manufacturer
National Semiconductor
Datasheet
1.DP83848I-MAU-EKNOPB.pdf
(84 pages)
Specifications of DP83848I-MAU-EK/NOPB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1.8 10 Mb/s and 100 Mb/s PMD Interface
1.9 Special Connections
1.10 Power Supply Pins
TD-, TD+
RD-, RD+
RBIAS
PFBOUT
PFBIN1
PFBIN2
RESERVED
IOVDD33
IOGND
DGND
AVDD33
AGND
Signal Name
Signal Name
Signal Name
Type
Type
I/O
I/O
I/O
O
I
I
32, 48
35, 47
15, 19
Pin #
36
22
16, 17
13, 14
20, 21
Pin #
Pin #
24
23
18
37
Differential common driver transmit output (PMD Output Pair).
These differential outputs are automatically configured to either
10BASE-T or 100BASE-TX signaling.
In Auto-MDIX mode of operation, this pair can be used as the Re-
ceive Input pair.
These pins require 3.3V bias for operation.
Differential receive input (PMD Input Pair). These differential in-
puts are automatically configured to accept either 100BASE-TX
or 10BASE-T signaling.
In Auto-MDIX mode of operation, this pair can be used as the
Transmit Output pair.
These pins require 3.3V bias for operation.
Bias Resistor Connection. A 4.87 k
nected from RBIAS to GND.
Power Feedback Output. Parallel caps, 10 F (Tantalum pre-
ferred) and 0.1 F, should be placed close to the PFBOUT. Con-
nect this pin to PFBIN1 (pin 18) and PFBIN2 (pin 37). See
Section 5.4 for proper placement pin.
Power Feedback Input. These pins are fed with power from
PFBOUT pin. A small capacitor of 0.1 F should be connected
close to each pin.
Note: Do not supply power to these pins other than from
PFBOUT.
RESERVED: These pins must be pulled-up through 2.2 k resis-
tors to AVDD33 supply.
I/O 3.3V Supply
I/O Ground
Digital Ground
Analog 3.3V Supply
Analog Ground
14
Description
Description
Description
resistor should be con-
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