ISL9208EVAL2Z Intersil, ISL9208EVAL2Z Datasheet - Page 7

• Manufacturer Part Number: ISL9208EVAL2Z
• Description: EVAL BOARD 2 FOR ISL9208
• Manufacturer: Intersil

Specifications of ISL9208EVAL2Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating Specifications
ANALOG OUTPUT SPECIFICATIONS
Cell Monitor Analog Output Voltage
Accuracy
Cell Monitor Analog Output External
Temperature Accuracy
Internal Temperature Monitor Output
Voltage Slope
Internal Temperature Monitor Output
AO Output Stabilization Time
CELL BALANCE SPECIFICATIONS
Cell Balance Transistor r
Cell Balance Transistor Current
WAKE UP/SLEEP SPECIFICATIONS
Device WKUP Pin Voltage Threshold
(WKUP Pin Active High - Rising Edge)
Device Wkup Pin Hysteresis
(WKUP Pin Active High)
Input Resistance On WKUP
Device WKUP Pin Active Voltage
Threshold (WKUP Pin Active Low -
Falling Edge)
Device Wkup Pin Hysteresis
(WKUP Pin Active Low)
Device Wake-up Delay
FET CONTROL SPECIFICATIONS (FOR VCELL1, VCELL2, VCELL3 VOLTAGES FROM 2.8V TO 4.3V)
Control Outputs Response Time
(CFET, DFET)
CFET Gate Voltage
DFETGate Voltage
FET Turn On Current (DFET)
FET Turn On Current (CFET)
FET Turn Off Current (DFET)
DFET Resistance to VSS
PARAMETER
DS(ON)
7
Over the recommended operating conditions unless otherwise specified. (Continued)
V
V
SYMBOL
R
V
V
V
I
R
I
VCFET
VDFET
DF(OFF)
V
T
WKUP1H
WKUP2H
t
INTMON
I
CF(ON)
DF(OFF)
V
WKUP1
WKUP2
WKUP
DFON
t
R
WKUP
AOXT
INT25
VSC
t
I
AOC
CO
CB
CB
[V
External temperature monitoring accuracy.
Voltage error at AO when monitoring
TEMPI voltage (measured with
TEMPI = 1V)
Internal temperature monitor voltage
change
Output at +25°C
From SCL falling edge at data bit 0 of
command to AO output stable within 0.5%
of final value. AO voltage steps from 0V to
2V. (C
(Note 7)
(Note 6)
WKUP pin rising edge (WKPOL = 1)
Device wakes up and sets WKUP flag
HIGH.
WKUP pin falling edge hystersis
(WKPOL = 1) sets WKUP flag LOW (does
not automatically enter sleep mode)
Resistance from WKUP pin to VSS
(WKPOL = 1)
WKUP pin falling edge (WKPOL = 0)
Device wakes up and sets WKUP flag
HIGH.
WKUP pin rising edge hysteresis
(WKPOL = 0) sets WKUP flag LOW (does
not automatically enter sleep mode)
Delay after voltage on WKUP pin crosses
the threshold (rising or falling) before
activating the WKUP bit.
Bit 0 to start of control signal (DFET)
Bit 1 to start of control signal (CFET)
No load on CFET
No load on DFET
DFET voltage = 0 to VCELL3 -1.5V
CFET voltage = 0 to VCELL3 - 1.5V
DFET voltage = VDFET to 1V
VDFET <1V (When turning off the FET)
CELLN
AO
- (V
= 10pF)
TEST CONDITION
CELLN-1
ISL9208
)]/2 - AO
V
V
V
CELL1
CELL3
CELL3
MIN
130
100
-15
-10
3.5
20
80
80
- 2.6 V
- 0.5
- 0.5
CELL1
TYP
1.31
-3.5
100
230
200
130
200
180
5.0
1.0
40
4
5
- 2.0 V
CELL1
V
V
MAX
CELL3
CELL3
400
200
330
400
0.1
6.5
30
10
60
11
November 2, 2007
- 1.2
FN6446.1
mV/°C
UNIT
mV
mV
mA
mV
mV
mA
ms
kΩ
ms
µA
µA
µs
V
Ω
V
V
V
V
Ω