ISLA118P50IR72EV1Z Intersil, ISLA118P50IR72EV1Z Datasheet - Page 34

• Manufacturer Part Number: ISLA118P50IR72EV1Z
• Description: EVAL BOARD FOR ISLA118P50IR74
• Manufacturer: Intersil

Specifications of ISLA118P50IR72EV1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev.
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com:
To report errors or suggestions for this datasheet, please go to
FITs are available from our website at
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
5/19/10
3/30/10
DATE
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
For information regarding Intersil Corporation and its products, see
REVISION
FN7565.1
FN7565.0
in the quality certifications found at
34
www.intersil.com/products
-On page 1:
Removed CLKDIV from key feature list (Selectable Clock Divider: ÷1 or ÷2)
Removed CLKDIV pin from “Block Diagram”(was right nexto to CLKDIVRSTP pin)
-On page 3:
Removed CLKDIV pin from “Pin Configuration” diagram, replaced with a DNC pin (pin 16)
-On page 4:
Removed CLKDIV pin from “Pin Descriptions” list, added pin 16 to DNC list
-On page 8:
Under “CMOS INPUTS” in the “Digital Specifications” table, added CSB and SCLK to the CMOS pin list
(in Parameter column) for I_IH, I_IL, V_IH, V_IL
Removed CLKDIV reference from “Input Current High (OUTMODE, NAPSLP, OUTFMT) (Note 14)” and
“Input Current Low (OUTMODE, NAPSLP, OUTFMT)” specs
-On page 16:
Removed text and table describing CLKDIV function
-On page 20:
Removed sentences referencing the “2GSPS” block diagram under the “Clock Divider Synchronous
Reset” section as we no longer support this clock distribution block diagram, nor su/hold times to
support closing timing at 1GHz input clock
-On page 21:
Removed Sync generation block diagram (former FIGURE 38. SYNCHRONIZATION SCHEME) because
we no longer support this architecture
-On page 26:
Updated “Address 0x71: phase_slip” section to reflect functionality in the CLKDIV1 mode. New timing
diagram Figure 44 to show functionality.
Removed the “ADDRESS 0X72: CLOCK_DIVIDE” section and table for SPI address 0x72, clock_divide
feature
-On page 29:
Removed the clock_divide SPI register from Table 15 under ADDR 72, replacing with Reserved (and
indicating which bits must be set to 0)
-On page 32:
Removed the CLKDIV reference in “Unused Inputs” section
Initial Release of Production Datasheet
For additional products, see
ISLA118P50
http://rel.intersil.com/reports/search.php
ISLA118P50
for a complete list of Intersil product families.
www.intersil.com/product_tree
www.intersil.com/design/quality
www.intersil.com/askourstaff
CHANGE
www.intersil.com
June 4, 2010
FN7565.1