DC1400A Linear Technology, DC1400A Datasheet - Page 17

• Manufacturer Part Number: DC1400A
• Description: BOARD EVAL LTM4608
• Manufacturer: Linear Technology
• Series: LTM®r

Specifications of DC1400A

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 1.2V, 1.5V, 1.8V, 2.5V, 3.3V
• Current - Output: 8A
• Voltage - Input: 2.5 ~ 5.5 V
• Regulator Topology: Buck
• Frequency - Switching: 1.5MHz
• Board Type: Fully Populated
• Utilized Ic / Part: LTM4608
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Power - Output: -

Slope Compensation
The module has already been internally compensated for
all output voltages. Table 3 is provided for most applica-
tion requirements. A spice model will be provided for other
control loop optimization. For single module operation,
connect I
pins together and then connect to SGND at one point. Tie
I
Output Margining
For a convenient system stress test on the LTM4608A’s
output, the user can program the LTM4608A’s output to
±5%, ±10% or ±15% of its normal operational voltage.
The margin pin with a voltage divider is driven with a small
three-state gate as shown in Figure 18, for the three margin
states (high, low, no margin). When the MGN pin is < 0.3V,
it forces negative margining in which the output voltage
is below the regulation point. When MGN is >V
the output voltage is forced above the regulation point.
The amount of output voltage margining is determined by
the BSEL pin. When BSEL is low, it is 5%. When BSEL is
APPLICATIONS INFORMATION
TH
pins together to share currents evenly for all phases.
Figure 7. 3.3V
THM
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
pin to SGND. For parallel operation, tie I
IN
2
, 2.5V and 1.5V
LOAD CURRENT (A)
4
3.3V
3.3V
6
OUT
IN
IN
1.5V
2.5V
Power Loss
4608A F07
OUT
OUT
8
IN
– 0.3V,
THM
high, it is 10%. When BSEL is floating, it is 15%. When
margining is active, the internal output overvoltage and
undervoltage comparators are disabled and PGOOD re-
mains high. Margining is disabled by tying the MGN pin
to a voltage divider as shown in Figure 20.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θ
module with various heat sinking methods. Thermal models
are derived from several temperature measurements at
the bench, and thermal modeling analysis. Thermal Ap-
plication Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
Tables 4 and 5 provide a summary of the equivalent θ
for the noted conditions. These equivalent θ
are correlated to the measured values and improve with
air flow. The junction temperature is maintained at 125°C
or below for the derating curves.
Figure 8. 5V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
IN
2
, 3.3V and 1.5V
LOAD CURRENT (A)
4
5V
5V
OUT
LTM4608A
6
IN
IN
1.5V
3.3V
Power Loss
4608A F08
OUT
OUT
JA
8
parameters
JA
17
for the
4608afc
JA