NCP1529ASNT1GEVB ON Semiconductor, NCP1529ASNT1GEVB Datasheet - Page 2

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NCP1529ASNT1GEVB

Manufacturer Part Number
NCP1529ASNT1GEVB
Description
BOARD EVAL NCP1529
Manufacturer
ON Semiconductor
Datasheets

Specifications of NCP1529ASNT1GEVB

Design Resources
NCP1529ASNT1GEVB Schematic NCP1529ASNT1GEVB Gerber Files NCP1529ASNT1GEVB Bill of Materials
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. Exposed pad for UDFN6 package, named Pin 7, must be connected to system ground.
PIN FUNCTION DESCRIPTION
TSOP−5
Pin
1
2
3
4
5
Figure 3. Pin Connections − TSOP−5
(Note 1)
UDFN6
2,4,7
Pin
6
5
3
1
GND
SW
EN
1
2
3
Pin Name
(Top View)
GND
VIN
SW
EN
FB
100
90
80
70
60
50
40
30
20
10
0
5
0
4
Power Ground
Analog Output
Analog Input
Analog Input
FB
VIN
Power Input
Analog /
Analog /
Figure 5. Efficiency vs Output Current
Type
V
IN
PIN CONNECTIONS
PERFORMANCES
http://onsemi.com
= 3.6 V, V
Enable for switching regulators. This pin is active HIGH and is turned off by
logic LOW on this pin.
This pin is the GND reference for the NFET power stage and the analog
section of the IC. The pin must be connected to the system ground.
Connection from power MOSFETs to the Inductor.
Power supply input for the PFET power stage, analog and digital blocks. The
pin must be decoupled to ground by a 4.7 mF ceramic capacitor.
Feedback voltage from the output of the power supply. This is the input to the
error amplifier.
I
OUT
500
2
(mA)
OUT
= 3.3 V
Figure 4. Pin Connections − UDFN6
GND
VIN
FB
Description
1
2
3
1000
(Top View)
7
6
5 SW
4
EN
GND

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