MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 87

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
6.3.3
31
15
Reserved
30
14
Bits 31:24
Bits 22:21
Bits 1:0 SW: System clock switch
Clock interrupt register (RCC_CIR)
Address offset: 0x08
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
Bit 23 CSSC: Clock security system interrupt clear
Bit 20 PLLRDYC: PLL ready interrupt clear
Bit 19 HSERDYC: HSE ready interrupt clear
Bit 18 HSIRDYC: HSI ready interrupt clear
29
13
RDYIE
PLL
Set and cleared by software to select SYSCLK source.
Set by hardware to force HSI selection when leaving Stop and Standby mode or in case of
failure of the HSE oscillator used directly or indirectly as system clock (if the Clock Security
System is enabled).
00: HSI selected as system clock
01: HSE selected as system clock
10: PLL selected as system clock
11: not allowed
28
12
rw
Reserved, always read as 0.
This bit is set by software to clear the CSSF flag.
0: No effect
1: Clear CSSF flag
Reserved, always read as 0.
This bit is set by software to clear the PLLRDYF flag.
0: No effect
1: PLLRDYF cleared
This bit is set by software to clear the HSERDYF flag.
0: No effect
1: HSERDYF cleared
This bit is set software to clear the HSIRDYF flag.
0: No effect
1: HSIRDYF cleared
Reserved
RDYIE
HSE
27
11
rw
RDYIE
HSI
26
10
rw
Low-, medium- and high-density reset and clock control (RCC)
RDYIE
LSE
25
rw
9
Doc ID 13902 Rev 9
RDYIE
LSI
24
rw
8
CSSC
CSSF
23
w
7
r
22
6
Reserved
Reserved
21
5
RDYC
RDYF
PLL
PLL
20
w
4
r
RDYC
RDYF
HSE
HSE
19
w
3
r
RDYC
RDYF
HSI
HSI
18
w
2
r
RDYC
RDYF
LSE
LSE
17
w
1
r
87/995
RDYC
RDYF
LSI
LSI
16
w
0
r